\doxysection{stm32h7xx\+\_\+ll\+\_\+usart.\+h}
\hypertarget{stm32h7xx__ll__usart_8h_source}{}\label{stm32h7xx__ll__usart_8h_source}\index{C:/Users/ASUS/Desktop/dm-\/ctrlH7-\/balance-\/9025test/Drivers/STM32H7xx\_HAL\_Driver/Inc/stm32h7xx\_ll\_usart.h@{C:/Users/ASUS/Desktop/dm-\/ctrlH7-\/balance-\/9025test/Drivers/STM32H7xx\_HAL\_Driver/Inc/stm32h7xx\_ll\_usart.h}}
\mbox{\hyperlink{stm32h7xx__ll__usart_8h}{Go to the documentation of this file.}}
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\DoxyCodeLine{00193\ \textcolor{preprocessor}{\#define\ LL\_USART\_ICR\_PECF\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ USART\_ICR\_PECF\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
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\DoxyCodeLine{00268\ \textcolor{preprocessor}{\#define\ LL\_USART\_CR3\_RXFTIE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ USART\_CR3\_RXFTIE\ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
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\DoxyCodeLine{00276\ \textcolor{preprocessor}{\#define\ LL\_USART\_FIFOTHRESHOLD\_1\_8\ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000000U\ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00277\ \textcolor{preprocessor}{\#define\ LL\_USART\_FIFOTHRESHOLD\_1\_4\ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000001U\ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00278\ \textcolor{preprocessor}{\#define\ LL\_USART\_FIFOTHRESHOLD\_1\_2\ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000002U\ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00279\ \textcolor{preprocessor}{\#define\ LL\_USART\_FIFOTHRESHOLD\_3\_4\ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000003U\ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00280\ \textcolor{preprocessor}{\#define\ LL\_USART\_FIFOTHRESHOLD\_7\_8\ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000004U\ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00281\ \textcolor{preprocessor}{\#define\ LL\_USART\_FIFOTHRESHOLD\_8\_8\ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000005U\ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
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\DoxyCodeLine{00289\ \textcolor{preprocessor}{\#define\ LL\_USART\_DIRECTION\_NONE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000000U\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00290\ \textcolor{preprocessor}{\#define\ LL\_USART\_DIRECTION\_RX\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ USART\_CR1\_RE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00291\ \textcolor{preprocessor}{\#define\ LL\_USART\_DIRECTION\_TX\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ USART\_CR1\_TE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00292\ \textcolor{preprocessor}{\#define\ LL\_USART\_DIRECTION\_TX\_RX\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (USART\_CR1\_TE\ |USART\_CR1\_RE)\ \ \ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00296\ }
\DoxyCodeLine{00300\ \textcolor{preprocessor}{\#define\ LL\_USART\_PARITY\_NONE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000000U\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00301\ \textcolor{preprocessor}{\#define\ LL\_USART\_PARITY\_EVEN\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ USART\_CR1\_PCE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00302\ \textcolor{preprocessor}{\#define\ LL\_USART\_PARITY\_ODD\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (USART\_CR1\_PCE\ |\ USART\_CR1\_PS)\ \ \ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00306\ }
\DoxyCodeLine{00310\ \textcolor{preprocessor}{\#define\ LL\_USART\_WAKEUP\_IDLELINE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000000U\ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00311\ \textcolor{preprocessor}{\#define\ LL\_USART\_WAKEUP\_ADDRESSMARK\ \ \ \ \ \ \ \ \ \ \ \ \ USART\_CR1\_WAKE\ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00315\ }
\DoxyCodeLine{00319\ \textcolor{preprocessor}{\#define\ LL\_USART\_DATAWIDTH\_7B\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ USART\_CR1\_M1\ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00320\ \textcolor{preprocessor}{\#define\ LL\_USART\_DATAWIDTH\_8B\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000000U\ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00321\ \textcolor{preprocessor}{\#define\ LL\_USART\_DATAWIDTH\_9B\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ USART\_CR1\_M0\ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00325\ }
\DoxyCodeLine{00329\ \textcolor{preprocessor}{\#define\ LL\_USART\_OVERSAMPLING\_16\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000000U\ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00330\ \textcolor{preprocessor}{\#define\ LL\_USART\_OVERSAMPLING\_8\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ USART\_CR1\_OVER8\ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00334\ }
\DoxyCodeLine{00335\ \textcolor{preprocessor}{\#if\ defined(USE\_FULL\_LL\_DRIVER)}\textcolor{preprocessor}{}}
\DoxyCodeLine{00339\ }
\DoxyCodeLine{00340\ \textcolor{preprocessor}{\#define\ LL\_USART\_CLOCK\_DISABLE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000000U\ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00341\ \textcolor{preprocessor}{\#define\ LL\_USART\_CLOCK\_ENABLE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ USART\_CR2\_CLKEN\ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00345\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*USE\_FULL\_LL\_DRIVER*/}\textcolor{preprocessor}{}}
\DoxyCodeLine{00346\ }
\DoxyCodeLine{00350\ \textcolor{preprocessor}{\#define\ LL\_USART\_LASTCLKPULSE\_NO\_OUTPUT\ \ \ \ \ \ \ \ \ 0x00000000U\ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00351\ \textcolor{preprocessor}{\#define\ LL\_USART\_LASTCLKPULSE\_OUTPUT\ \ \ \ \ \ \ \ \ \ \ \ USART\_CR2\_LBCL\ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00355\ }
\DoxyCodeLine{00359\ \textcolor{preprocessor}{\#define\ LL\_USART\_PHASE\_1EDGE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000000U\ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00360\ \textcolor{preprocessor}{\#define\ LL\_USART\_PHASE\_2EDGE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ USART\_CR2\_CPHA\ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00364\ }
\DoxyCodeLine{00368\ \textcolor{preprocessor}{\#define\ LL\_USART\_POLARITY\_LOW\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000000U\ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00369\ \textcolor{preprocessor}{\#define\ LL\_USART\_POLARITY\_HIGH\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ USART\_CR2\_CPOL\ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00373\ }
\DoxyCodeLine{00377\ \textcolor{preprocessor}{\#define\ LL\_USART\_PRESCALER\_DIV1\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000000U\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00378\ \textcolor{preprocessor}{\#define\ LL\_USART\_PRESCALER\_DIV2\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (USART\_PRESC\_PRESCALER\_0)\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00379\ \textcolor{preprocessor}{\#define\ LL\_USART\_PRESCALER\_DIV4\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (USART\_PRESC\_PRESCALER\_1)\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00380\ \textcolor{preprocessor}{\#define\ LL\_USART\_PRESCALER\_DIV6\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (USART\_PRESC\_PRESCALER\_1\ |\ USART\_PRESC\_PRESCALER\_0)\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00381\ \textcolor{preprocessor}{\#define\ LL\_USART\_PRESCALER\_DIV8\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (USART\_PRESC\_PRESCALER\_2)\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00382\ \textcolor{preprocessor}{\#define\ LL\_USART\_PRESCALER\_DIV10\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (USART\_PRESC\_PRESCALER\_2\ |\ USART\_PRESC\_PRESCALER\_0)\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00383\ \textcolor{preprocessor}{\#define\ LL\_USART\_PRESCALER\_DIV12\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (USART\_PRESC\_PRESCALER\_2\ |\ USART\_PRESC\_PRESCALER\_1)\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00384\ \textcolor{preprocessor}{\#define\ LL\_USART\_PRESCALER\_DIV16\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (USART\_PRESC\_PRESCALER\_2\ |\ USART\_PRESC\_PRESCALER\_1\ |\ USART\_PRESC\_PRESCALER\_0)\ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00385\ \textcolor{preprocessor}{\#define\ LL\_USART\_PRESCALER\_DIV32\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (USART\_PRESC\_PRESCALER\_3)\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00386\ \textcolor{preprocessor}{\#define\ LL\_USART\_PRESCALER\_DIV64\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (USART\_PRESC\_PRESCALER\_3\ |\ USART\_PRESC\_PRESCALER\_0)\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00387\ \textcolor{preprocessor}{\#define\ LL\_USART\_PRESCALER\_DIV128\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (USART\_PRESC\_PRESCALER\_3\ |\ USART\_PRESC\_PRESCALER\_1)\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00388\ \textcolor{preprocessor}{\#define\ LL\_USART\_PRESCALER\_DIV256\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (USART\_PRESC\_PRESCALER\_3\ |\ USART\_PRESC\_PRESCALER\_1\ |\ USART\_PRESC\_PRESCALER\_0)\ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00392\ }
\DoxyCodeLine{00396\ \textcolor{preprocessor}{\#define\ LL\_USART\_STOPBITS\_0\_5\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ USART\_CR2\_STOP\_0\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00397\ \textcolor{preprocessor}{\#define\ LL\_USART\_STOPBITS\_1\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000000U\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00398\ \textcolor{preprocessor}{\#define\ LL\_USART\_STOPBITS\_1\_5\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (USART\_CR2\_STOP\_0\ |\ USART\_CR2\_STOP\_1)\ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00399\ \textcolor{preprocessor}{\#define\ LL\_USART\_STOPBITS\_2\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ USART\_CR2\_STOP\_1\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00403\ }
\DoxyCodeLine{00407\ \textcolor{preprocessor}{\#define\ LL\_USART\_TXRX\_STANDARD\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000000U\ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00408\ \textcolor{preprocessor}{\#define\ LL\_USART\_TXRX\_SWAPPED\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (USART\_CR2\_SWAP)\ \ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00412\ }
\DoxyCodeLine{00416\ \textcolor{preprocessor}{\#define\ LL\_USART\_RXPIN\_LEVEL\_STANDARD\ \ \ \ \ \ \ \ \ \ \ 0x00000000U\ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00417\ \textcolor{preprocessor}{\#define\ LL\_USART\_RXPIN\_LEVEL\_INVERTED\ \ \ \ \ \ \ \ \ \ \ (USART\_CR2\_RXINV)\ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00421\ }
\DoxyCodeLine{00425\ \textcolor{preprocessor}{\#define\ LL\_USART\_TXPIN\_LEVEL\_STANDARD\ \ \ \ \ \ \ \ \ \ \ 0x00000000U\ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00426\ \textcolor{preprocessor}{\#define\ LL\_USART\_TXPIN\_LEVEL\_INVERTED\ \ \ \ \ \ \ \ \ \ \ (USART\_CR2\_TXINV)\ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00430\ }
\DoxyCodeLine{00434\ \textcolor{preprocessor}{\#define\ LL\_USART\_BINARY\_LOGIC\_POSITIVE\ \ \ \ \ \ \ \ \ \ 0x00000000U\ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00435\ \textcolor{preprocessor}{\#define\ LL\_USART\_BINARY\_LOGIC\_NEGATIVE\ \ \ \ \ \ \ \ \ \ USART\_CR2\_DATAINV\ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00439\ }
\DoxyCodeLine{00443\ \textcolor{preprocessor}{\#define\ LL\_USART\_BITORDER\_LSBFIRST\ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000000U\ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00444\ \textcolor{preprocessor}{\#define\ LL\_USART\_BITORDER\_MSBFIRST\ \ \ \ \ \ \ \ \ \ \ \ \ \ USART\_CR2\_MSBFIRST\ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00448\ }
\DoxyCodeLine{00452\ \textcolor{preprocessor}{\#define\ LL\_USART\_AUTOBAUD\_DETECT\_ON\_STARTBIT\ \ \ \ 0x00000000U\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00453\ \textcolor{preprocessor}{\#define\ LL\_USART\_AUTOBAUD\_DETECT\_ON\_FALLINGEDGE\ USART\_CR2\_ABRMODE\_0\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00454\ \textcolor{preprocessor}{\#define\ LL\_USART\_AUTOBAUD\_DETECT\_ON\_7F\_FRAME\ \ \ \ USART\_CR2\_ABRMODE\_1\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00455\ \textcolor{preprocessor}{\#define\ LL\_USART\_AUTOBAUD\_DETECT\_ON\_55\_FRAME\ \ \ \ (USART\_CR2\_ABRMODE\_1\ |\ USART\_CR2\_ABRMODE\_0)\ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00459\ }
\DoxyCodeLine{00463\ \textcolor{preprocessor}{\#define\ LL\_USART\_ADDRESS\_DETECT\_4B\ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000000U\ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00464\ \textcolor{preprocessor}{\#define\ LL\_USART\_ADDRESS\_DETECT\_7B\ \ \ \ \ \ \ \ \ \ \ \ \ \ USART\_CR2\_ADDM7\ \ \ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00468\ }
\DoxyCodeLine{00472\ \textcolor{preprocessor}{\#define\ LL\_USART\_HWCONTROL\_NONE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000000U\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00473\ \textcolor{preprocessor}{\#define\ LL\_USART\_HWCONTROL\_RTS\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ USART\_CR3\_RTSE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00474\ \textcolor{preprocessor}{\#define\ LL\_USART\_HWCONTROL\_CTS\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ USART\_CR3\_CTSE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00475\ \textcolor{preprocessor}{\#define\ LL\_USART\_HWCONTROL\_RTS\_CTS\ \ \ \ \ \ \ \ \ \ \ \ \ \ (USART\_CR3\_RTSE\ |\ USART\_CR3\_CTSE)\ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00479\ }
\DoxyCodeLine{00483\ \textcolor{preprocessor}{\#define\ LL\_USART\_WAKEUP\_ON\_ADDRESS\ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000000U\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00484\ \textcolor{preprocessor}{\#define\ LL\_USART\_WAKEUP\_ON\_STARTBIT\ \ \ \ \ \ \ \ \ \ \ \ \ USART\_CR3\_WUS\_1\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00485\ \textcolor{preprocessor}{\#define\ LL\_USART\_WAKEUP\_ON\_RXNE\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (USART\_CR3\_WUS\_0\ |\ USART\_CR3\_WUS\_1)\ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00489\ }
\DoxyCodeLine{00493\ \textcolor{preprocessor}{\#define\ LL\_USART\_IRDA\_POWER\_NORMAL\ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000000U\ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00494\ \textcolor{preprocessor}{\#define\ LL\_USART\_IRDA\_POWER\_LOW\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ USART\_CR3\_IRLP\ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00498\ }
\DoxyCodeLine{00502\ \textcolor{preprocessor}{\#define\ LL\_USART\_LINBREAK\_DETECT\_10B\ \ \ \ \ \ \ \ \ \ \ \ 0x00000000U\ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00503\ \textcolor{preprocessor}{\#define\ LL\_USART\_LINBREAK\_DETECT\_11B\ \ \ \ \ \ \ \ \ \ \ \ USART\_CR2\_LBDL\ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00507\ }
\DoxyCodeLine{00511\ \textcolor{preprocessor}{\#define\ LL\_USART\_DE\_POLARITY\_HIGH\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ 0x00000000U\ \ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00512\ \textcolor{preprocessor}{\#define\ LL\_USART\_DE\_POLARITY\_LOW\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ USART\_CR3\_DEP\ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00516\ }
\DoxyCodeLine{00520\ \textcolor{preprocessor}{\#define\ LL\_USART\_DMA\_REG\_DATA\_TRANSMIT\ \ \ \ \ \ \ \ \ \ 0x00000000U\ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}}
\DoxyCodeLine{00521\ \textcolor{preprocessor}{\#define\ LL\_USART\_DMA\_REG\_DATA\_RECEIVE\ \ \ \ \ \ \ \ \ \ \ 0x00000001U\ \ \ \ \ \ \ \ \ \ }\textcolor{preprocessor}{}\textcolor{preprocessor}{}}
\DoxyCodeLine{00525\ }
\DoxyCodeLine{00529\ }
\DoxyCodeLine{00530\ \textcolor{comment}{/*\ Exported\ macro\ -\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/*/}}
\DoxyCodeLine{00534\ }
\DoxyCodeLine{00538\ }
\DoxyCodeLine{00546\ \textcolor{preprocessor}{\#define\ LL\_USART\_WriteReg(\_\_INSTANCE\_\_,\ \_\_REG\_\_,\ \_\_VALUE\_\_)\ WRITE\_REG(\_\_INSTANCE\_\_-\/>\_\_REG\_\_,\ (\_\_VALUE\_\_))}}
\DoxyCodeLine{00547\ }
\DoxyCodeLine{00554\ \textcolor{preprocessor}{\#define\ LL\_USART\_ReadReg(\_\_INSTANCE\_\_,\ \_\_REG\_\_)\ READ\_REG(\_\_INSTANCE\_\_-\/>\_\_REG\_\_)}\textcolor{preprocessor}{}}
\DoxyCodeLine{00558\ }
\DoxyCodeLine{00562\ }
\DoxyCodeLine{00583\ \textcolor{preprocessor}{\#define\ \_\_LL\_USART\_DIV\_SAMPLING8(\_\_PERIPHCLK\_\_,\ \_\_PRESCALER\_\_,\ \_\_BAUDRATE\_\_)\ \(\backslash\)}}
\DoxyCodeLine{00584\ \textcolor{preprocessor}{\ \ (((((\_\_PERIPHCLK\_\_)/(USART\_PRESCALER\_TAB[(\_\_PRESCALER\_\_)]))*2U)\(\backslash\)}}
\DoxyCodeLine{00585\ \textcolor{preprocessor}{\ \ \ \ +\ ((\_\_BAUDRATE\_\_)/2U))/(\_\_BAUDRATE\_\_))}}
\DoxyCodeLine{00586\ }
\DoxyCodeLine{00607\ \textcolor{preprocessor}{\#define\ \_\_LL\_USART\_DIV\_SAMPLING16(\_\_PERIPHCLK\_\_,\ \_\_PRESCALER\_\_,\ \_\_BAUDRATE\_\_)\ \(\backslash\)}}
\DoxyCodeLine{00608\ \textcolor{preprocessor}{\ \ ((((\_\_PERIPHCLK\_\_)/(USART\_PRESCALER\_TAB[(\_\_PRESCALER\_\_)]))\(\backslash\)}}
\DoxyCodeLine{00609\ \textcolor{preprocessor}{\ \ \ \ +\ ((\_\_BAUDRATE\_\_)/2U))/(\_\_BAUDRATE\_\_))}}
\DoxyCodeLine{00610\ }
\DoxyCodeLine{00614\ }
\DoxyCodeLine{00618\ }
\DoxyCodeLine{00619\ \textcolor{comment}{/*\ Exported\ functions\ -\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/-\/*/}}
\DoxyCodeLine{00620\ }
\DoxyCodeLine{00624\ }
\DoxyCodeLine{00628\ }
\DoxyCodeLine{00635\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_Enable(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{00636\ \{}
\DoxyCodeLine{00637\ \ \ SET\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6d7dcd3972a162627bc3470cbf992ec4}{CR1}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga2bb650676aaae4a5203f372d497d5947}{USART\_CR1\_UE}});}
\DoxyCodeLine{00638\ \}}
\DoxyCodeLine{00639\ }
\DoxyCodeLine{00649\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_Disable(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{00650\ \{}
\DoxyCodeLine{00651\ \ \ CLEAR\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6d7dcd3972a162627bc3470cbf992ec4}{CR1}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga2bb650676aaae4a5203f372d497d5947}{USART\_CR1\_UE}});}
\DoxyCodeLine{00652\ \}}
\DoxyCodeLine{00653\ }
\DoxyCodeLine{00660\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_USART\_IsEnabled(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{00661\ \{}
\DoxyCodeLine{00662\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6d7dcd3972a162627bc3470cbf992ec4}{CR1}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga2bb650676aaae4a5203f372d497d5947}{USART\_CR1\_UE}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga2bb650676aaae4a5203f372d497d5947}{USART\_CR1\_UE}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{00663\ \}}
\DoxyCodeLine{00664\ }
\DoxyCodeLine{00673\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_EnableFIFO(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{00674\ \{}
\DoxyCodeLine{00675\ \ \ SET\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6d7dcd3972a162627bc3470cbf992ec4}{CR1}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gafb5e9fc4111b0159c65811f6a206c192}{USART\_CR1\_FIFOEN}});}
\DoxyCodeLine{00676\ \}}
\DoxyCodeLine{00677\ }
\DoxyCodeLine{00686\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_DisableFIFO(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{00687\ \{}
\DoxyCodeLine{00688\ \ \ CLEAR\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6d7dcd3972a162627bc3470cbf992ec4}{CR1}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gafb5e9fc4111b0159c65811f6a206c192}{USART\_CR1\_FIFOEN}});}
\DoxyCodeLine{00689\ \}}
\DoxyCodeLine{00690\ }
\DoxyCodeLine{00699\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_USART\_IsEnabledFIFO(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{00700\ \{}
\DoxyCodeLine{00701\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6d7dcd3972a162627bc3470cbf992ec4}{CR1}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gafb5e9fc4111b0159c65811f6a206c192}{USART\_CR1\_FIFOEN}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_gafb5e9fc4111b0159c65811f6a206c192}{USART\_CR1\_FIFOEN}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{00702\ \}}
\DoxyCodeLine{00703\ }
\DoxyCodeLine{00719\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_SetTXFIFOThreshold(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx,\ uint32\_t\ Threshold)}
\DoxyCodeLine{00720\ \{}
\DoxyCodeLine{00721\ \ \ ATOMIC\_MODIFY\_REG(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga3fcfeb5d260242461009770e93fe5d63}{USART\_CR3\_TXFTCFG}},\ Threshold\ <<\ USART\_CR3\_TXFTCFG\_Pos);}
\DoxyCodeLine{00722\ \}}
\DoxyCodeLine{00723\ }
\DoxyCodeLine{00738\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_USART\_GetTXFIFOThreshold(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{00739\ \{}
\DoxyCodeLine{00740\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga3fcfeb5d260242461009770e93fe5d63}{USART\_CR3\_TXFTCFG}})\ >>\ USART\_CR3\_TXFTCFG\_Pos);}
\DoxyCodeLine{00741\ \}}
\DoxyCodeLine{00742\ }
\DoxyCodeLine{00758\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_SetRXFIFOThreshold(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx,\ uint32\_t\ Threshold)}
\DoxyCodeLine{00759\ \{}
\DoxyCodeLine{00760\ \ \ ATOMIC\_MODIFY\_REG(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gab90e1ecd73a2286ea1e5f056fb2b51d3}{USART\_CR3\_RXFTCFG}},\ Threshold\ <<\ USART\_CR3\_RXFTCFG\_Pos);}
\DoxyCodeLine{00761\ \}}
\DoxyCodeLine{00762\ }
\DoxyCodeLine{00777\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_USART\_GetRXFIFOThreshold(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{00778\ \{}
\DoxyCodeLine{00779\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gab90e1ecd73a2286ea1e5f056fb2b51d3}{USART\_CR3\_RXFTCFG}})\ >>\ USART\_CR3\_RXFTCFG\_Pos);}
\DoxyCodeLine{00780\ \}}
\DoxyCodeLine{00781\ }
\DoxyCodeLine{00805\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_ConfigFIFOsThreshold(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx,\ uint32\_t\ TXThreshold,\ uint32\_t\ RXThreshold)}
\DoxyCodeLine{00806\ \{}
\DoxyCodeLine{00807\ \ \ ATOMIC\_MODIFY\_REG(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga3fcfeb5d260242461009770e93fe5d63}{USART\_CR3\_TXFTCFG}}\ |\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gab90e1ecd73a2286ea1e5f056fb2b51d3}{USART\_CR3\_RXFTCFG}},\ (TXThreshold\ <<\ USART\_CR3\_TXFTCFG\_Pos)\ |}
\DoxyCodeLine{00808\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ (RXThreshold\ <<\ USART\_CR3\_RXFTCFG\_Pos));}
\DoxyCodeLine{00809\ \}}
\DoxyCodeLine{00810\ }
\DoxyCodeLine{00821\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_EnableInStopMode(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{00822\ \{}
\DoxyCodeLine{00823\ \ \ ATOMIC\_SET\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6d7dcd3972a162627bc3470cbf992ec4}{CR1}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga1bf035f3a6674183945975fdda9e5d3a}{USART\_CR1\_UESM}});}
\DoxyCodeLine{00824\ \}}
\DoxyCodeLine{00825\ }
\DoxyCodeLine{00835\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_DisableInStopMode(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{00836\ \{}
\DoxyCodeLine{00837\ \ \ ATOMIC\_CLEAR\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6d7dcd3972a162627bc3470cbf992ec4}{CR1}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga1bf035f3a6674183945975fdda9e5d3a}{USART\_CR1\_UESM}});}
\DoxyCodeLine{00838\ \}}
\DoxyCodeLine{00839\ }
\DoxyCodeLine{00848\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_USART\_IsEnabledInStopMode(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{00849\ \{}
\DoxyCodeLine{00850\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6d7dcd3972a162627bc3470cbf992ec4}{CR1}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga1bf035f3a6674183945975fdda9e5d3a}{USART\_CR1\_UESM}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga1bf035f3a6674183945975fdda9e5d3a}{USART\_CR1\_UESM}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{00851\ \}}
\DoxyCodeLine{00852\ }
\DoxyCodeLine{00859\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_EnableDirectionRx(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{00860\ \{}
\DoxyCodeLine{00861\ \ \ ATOMIC\_SET\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6d7dcd3972a162627bc3470cbf992ec4}{CR1}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gada0d5d407a22264de847bc1b40a17aeb}{USART\_CR1\_RE}});}
\DoxyCodeLine{00862\ \}}
\DoxyCodeLine{00863\ }
\DoxyCodeLine{00870\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_DisableDirectionRx(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{00871\ \{}
\DoxyCodeLine{00872\ \ \ ATOMIC\_CLEAR\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6d7dcd3972a162627bc3470cbf992ec4}{CR1}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gada0d5d407a22264de847bc1b40a17aeb}{USART\_CR1\_RE}});}
\DoxyCodeLine{00873\ \}}
\DoxyCodeLine{00874\ }
\DoxyCodeLine{00881\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_EnableDirectionTx(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{00882\ \{}
\DoxyCodeLine{00883\ \ \ ATOMIC\_SET\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6d7dcd3972a162627bc3470cbf992ec4}{CR1}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gade7f090b04fd78b755b43357ecaa9622}{USART\_CR1\_TE}});}
\DoxyCodeLine{00884\ \}}
\DoxyCodeLine{00885\ }
\DoxyCodeLine{00892\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_DisableDirectionTx(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{00893\ \{}
\DoxyCodeLine{00894\ \ \ ATOMIC\_CLEAR\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6d7dcd3972a162627bc3470cbf992ec4}{CR1}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gade7f090b04fd78b755b43357ecaa9622}{USART\_CR1\_TE}});}
\DoxyCodeLine{00895\ \}}
\DoxyCodeLine{00896\ }
\DoxyCodeLine{00910\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_SetTransferDirection(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx,\ uint32\_t\ TransferDirection)}
\DoxyCodeLine{00911\ \{}
\DoxyCodeLine{00912\ \ \ ATOMIC\_MODIFY\_REG(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6d7dcd3972a162627bc3470cbf992ec4}{CR1}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gada0d5d407a22264de847bc1b40a17aeb}{USART\_CR1\_RE}}\ |\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gade7f090b04fd78b755b43357ecaa9622}{USART\_CR1\_TE}},\ TransferDirection);}
\DoxyCodeLine{00913\ \}}
\DoxyCodeLine{00914\ }
\DoxyCodeLine{00926\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_USART\_GetTransferDirection(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{00927\ \{}
\DoxyCodeLine{00928\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6d7dcd3972a162627bc3470cbf992ec4}{CR1}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gada0d5d407a22264de847bc1b40a17aeb}{USART\_CR1\_RE}}\ |\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gade7f090b04fd78b755b43357ecaa9622}{USART\_CR1\_TE}}));}
\DoxyCodeLine{00929\ \}}
\DoxyCodeLine{00930\ }
\DoxyCodeLine{00945\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_SetParity(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx,\ uint32\_t\ Parity)}
\DoxyCodeLine{00946\ \{}
\DoxyCodeLine{00947\ \ \ MODIFY\_REG(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6d7dcd3972a162627bc3470cbf992ec4}{CR1}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga2e159d36ab2c93a2c1942df60e9eebbe}{USART\_CR1\_PS}}\ |\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga60f8fcf084f9a8514efafb617c70b074}{USART\_CR1\_PCE}},\ Parity);}
\DoxyCodeLine{00948\ \}}
\DoxyCodeLine{00949\ }
\DoxyCodeLine{00960\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_USART\_GetParity(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{00961\ \{}
\DoxyCodeLine{00962\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6d7dcd3972a162627bc3470cbf992ec4}{CR1}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga2e159d36ab2c93a2c1942df60e9eebbe}{USART\_CR1\_PS}}\ |\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga60f8fcf084f9a8514efafb617c70b074}{USART\_CR1\_PCE}}));}
\DoxyCodeLine{00963\ \}}
\DoxyCodeLine{00964\ }
\DoxyCodeLine{00974\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_SetWakeUpMethod(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx,\ uint32\_t\ Method)}
\DoxyCodeLine{00975\ \{}
\DoxyCodeLine{00976\ \ \ MODIFY\_REG(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6d7dcd3972a162627bc3470cbf992ec4}{CR1}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gad831dfc169fcf14b7284984dbecf322d}{USART\_CR1\_WAKE}},\ Method);}
\DoxyCodeLine{00977\ \}}
\DoxyCodeLine{00978\ }
\DoxyCodeLine{00987\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_USART\_GetWakeUpMethod(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{00988\ \{}
\DoxyCodeLine{00989\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6d7dcd3972a162627bc3470cbf992ec4}{CR1}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gad831dfc169fcf14b7284984dbecf322d}{USART\_CR1\_WAKE}}));}
\DoxyCodeLine{00990\ \}}
\DoxyCodeLine{00991\ }
\DoxyCodeLine{01003\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_SetDataWidth(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx,\ uint32\_t\ DataWidth)}
\DoxyCodeLine{01004\ \{}
\DoxyCodeLine{01005\ \ \ MODIFY\_REG(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6d7dcd3972a162627bc3470cbf992ec4}{CR1}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga95f0288b9c6aaeca7cb6550a2e6833e2}{USART\_CR1\_M}},\ DataWidth);}
\DoxyCodeLine{01006\ \}}
\DoxyCodeLine{01007\ }
\DoxyCodeLine{01018\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_USART\_GetDataWidth(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{01019\ \{}
\DoxyCodeLine{01020\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6d7dcd3972a162627bc3470cbf992ec4}{CR1}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga95f0288b9c6aaeca7cb6550a2e6833e2}{USART\_CR1\_M}}));}
\DoxyCodeLine{01021\ \}}
\DoxyCodeLine{01022\ }
\DoxyCodeLine{01029\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_EnableMuteMode(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{01030\ \{}
\DoxyCodeLine{01031\ \ \ ATOMIC\_SET\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6d7dcd3972a162627bc3470cbf992ec4}{CR1}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga4ae32b0c22f90fa8295d2ed96c2fd54d}{USART\_CR1\_MME}});}
\DoxyCodeLine{01032\ \}}
\DoxyCodeLine{01033\ }
\DoxyCodeLine{01040\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_DisableMuteMode(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{01041\ \{}
\DoxyCodeLine{01042\ \ \ ATOMIC\_CLEAR\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6d7dcd3972a162627bc3470cbf992ec4}{CR1}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga4ae32b0c22f90fa8295d2ed96c2fd54d}{USART\_CR1\_MME}});}
\DoxyCodeLine{01043\ \}}
\DoxyCodeLine{01044\ }
\DoxyCodeLine{01051\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_USART\_IsEnabledMuteMode(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{01052\ \{}
\DoxyCodeLine{01053\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6d7dcd3972a162627bc3470cbf992ec4}{CR1}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga4ae32b0c22f90fa8295d2ed96c2fd54d}{USART\_CR1\_MME}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga4ae32b0c22f90fa8295d2ed96c2fd54d}{USART\_CR1\_MME}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{01054\ \}}
\DoxyCodeLine{01055\ }
\DoxyCodeLine{01065\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_SetOverSampling(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx,\ uint32\_t\ OverSampling)}
\DoxyCodeLine{01066\ \{}
\DoxyCodeLine{01067\ \ \ MODIFY\_REG(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6d7dcd3972a162627bc3470cbf992ec4}{CR1}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gaed6caeb0cb48f1a7b34090f31a92a8e2}{USART\_CR1\_OVER8}},\ OverSampling);}
\DoxyCodeLine{01068\ \}}
\DoxyCodeLine{01069\ }
\DoxyCodeLine{01078\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_USART\_GetOverSampling(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{01079\ \{}
\DoxyCodeLine{01080\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6d7dcd3972a162627bc3470cbf992ec4}{CR1}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gaed6caeb0cb48f1a7b34090f31a92a8e2}{USART\_CR1\_OVER8}}));}
\DoxyCodeLine{01081\ \}}
\DoxyCodeLine{01082\ }
\DoxyCodeLine{01094\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_SetLastClkPulseOutput(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx,\ uint32\_t\ LastBitClockPulse)}
\DoxyCodeLine{01095\ \{}
\DoxyCodeLine{01096\ \ \ MODIFY\_REG(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_aa7ede2de6204c3fc4bd9fb328801c99a}{CR2}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga4a62e93ae7864e89622bdd92508b615e}{USART\_CR2\_LBCL}},\ LastBitClockPulse);}
\DoxyCodeLine{01097\ \}}
\DoxyCodeLine{01098\ }
\DoxyCodeLine{01110\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_USART\_GetLastClkPulseOutput(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{01111\ \{}
\DoxyCodeLine{01112\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_aa7ede2de6204c3fc4bd9fb328801c99a}{CR2}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga4a62e93ae7864e89622bdd92508b615e}{USART\_CR2\_LBCL}}));}
\DoxyCodeLine{01113\ \}}
\DoxyCodeLine{01114\ }
\DoxyCodeLine{01126\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_SetClockPhase(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx,\ uint32\_t\ ClockPhase)}
\DoxyCodeLine{01127\ \{}
\DoxyCodeLine{01128\ \ \ MODIFY\_REG(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_aa7ede2de6204c3fc4bd9fb328801c99a}{CR2}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga362976ce813e58310399d113d2cf09cb}{USART\_CR2\_CPHA}},\ ClockPhase);}
\DoxyCodeLine{01129\ \}}
\DoxyCodeLine{01130\ }
\DoxyCodeLine{01141\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_USART\_GetClockPhase(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{01142\ \{}
\DoxyCodeLine{01143\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_aa7ede2de6204c3fc4bd9fb328801c99a}{CR2}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga362976ce813e58310399d113d2cf09cb}{USART\_CR2\_CPHA}}));}
\DoxyCodeLine{01144\ \}}
\DoxyCodeLine{01145\ }
\DoxyCodeLine{01157\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_SetClockPolarity(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx,\ uint32\_t\ ClockPolarity)}
\DoxyCodeLine{01158\ \{}
\DoxyCodeLine{01159\ \ \ MODIFY\_REG(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_aa7ede2de6204c3fc4bd9fb328801c99a}{CR2}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gafbb4336ac93d94d4e78f9fb7b3a0dc68}{USART\_CR2\_CPOL}},\ ClockPolarity);}
\DoxyCodeLine{01160\ \}}
\DoxyCodeLine{01161\ }
\DoxyCodeLine{01172\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_USART\_GetClockPolarity(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{01173\ \{}
\DoxyCodeLine{01174\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_aa7ede2de6204c3fc4bd9fb328801c99a}{CR2}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gafbb4336ac93d94d4e78f9fb7b3a0dc68}{USART\_CR2\_CPOL}}));}
\DoxyCodeLine{01175\ \}}
\DoxyCodeLine{01176\ }
\DoxyCodeLine{01200\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_ConfigClock(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx,\ uint32\_t\ Phase,\ uint32\_t\ Polarity,\ uint32\_t\ LBCPOutput)}
\DoxyCodeLine{01201\ \{}
\DoxyCodeLine{01202\ \ \ MODIFY\_REG(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_aa7ede2de6204c3fc4bd9fb328801c99a}{CR2}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga362976ce813e58310399d113d2cf09cb}{USART\_CR2\_CPHA}}\ |\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gafbb4336ac93d94d4e78f9fb7b3a0dc68}{USART\_CR2\_CPOL}}\ |\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga4a62e93ae7864e89622bdd92508b615e}{USART\_CR2\_LBCL}},\ Phase\ |\ Polarity\ |\ LBCPOutput);}
\DoxyCodeLine{01203\ \}}
\DoxyCodeLine{01204\ }
\DoxyCodeLine{01226\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_SetPrescaler(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx,\ uint32\_t\ PrescalerValue)}
\DoxyCodeLine{01227\ \{}
\DoxyCodeLine{01228\ \ \ MODIFY\_REG(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_abe251663891063ada5a08d269c1d71a2}{PRESC}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga232a983aab5682e588622a06c176ebfa}{USART\_PRESC\_PRESCALER}},\ (uint16\_t)PrescalerValue);}
\DoxyCodeLine{01229\ \}}
\DoxyCodeLine{01230\ }
\DoxyCodeLine{01251\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_USART\_GetPrescaler(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{01252\ \{}
\DoxyCodeLine{01253\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_abe251663891063ada5a08d269c1d71a2}{PRESC}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga232a983aab5682e588622a06c176ebfa}{USART\_PRESC\_PRESCALER}}));}
\DoxyCodeLine{01254\ \}}
\DoxyCodeLine{01255\ }
\DoxyCodeLine{01264\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_EnableSCLKOutput(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{01265\ \{}
\DoxyCodeLine{01266\ \ \ SET\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_aa7ede2de6204c3fc4bd9fb328801c99a}{CR2}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga42a396cde02ffa0c4d3fd9817b6af853}{USART\_CR2\_CLKEN}});}
\DoxyCodeLine{01267\ \}}
\DoxyCodeLine{01268\ }
\DoxyCodeLine{01277\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_DisableSCLKOutput(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{01278\ \{}
\DoxyCodeLine{01279\ \ \ CLEAR\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_aa7ede2de6204c3fc4bd9fb328801c99a}{CR2}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga42a396cde02ffa0c4d3fd9817b6af853}{USART\_CR2\_CLKEN}});}
\DoxyCodeLine{01280\ \}}
\DoxyCodeLine{01281\ }
\DoxyCodeLine{01290\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_USART\_IsEnabledSCLKOutput(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{01291\ \{}
\DoxyCodeLine{01292\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_aa7ede2de6204c3fc4bd9fb328801c99a}{CR2}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga42a396cde02ffa0c4d3fd9817b6af853}{USART\_CR2\_CLKEN}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga42a396cde02ffa0c4d3fd9817b6af853}{USART\_CR2\_CLKEN}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{01293\ \}}
\DoxyCodeLine{01294\ }
\DoxyCodeLine{01306\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_SetStopBitsLength(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx,\ uint32\_t\ StopBits)}
\DoxyCodeLine{01307\ \{}
\DoxyCodeLine{01308\ \ \ MODIFY\_REG(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_aa7ede2de6204c3fc4bd9fb328801c99a}{CR2}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gaf993e483318ebcecffd18649de766dc6}{USART\_CR2\_STOP}},\ StopBits);}
\DoxyCodeLine{01309\ \}}
\DoxyCodeLine{01310\ }
\DoxyCodeLine{01321\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_USART\_GetStopBitsLength(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{01322\ \{}
\DoxyCodeLine{01323\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_aa7ede2de6204c3fc4bd9fb328801c99a}{CR2}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gaf993e483318ebcecffd18649de766dc6}{USART\_CR2\_STOP}}));}
\DoxyCodeLine{01324\ \}}
\DoxyCodeLine{01325\ }
\DoxyCodeLine{01353\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_ConfigCharacter(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx,\ uint32\_t\ DataWidth,\ uint32\_t\ Parity,}
\DoxyCodeLine{01354\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ uint32\_t\ StopBits)}
\DoxyCodeLine{01355\ \{}
\DoxyCodeLine{01356\ \ \ MODIFY\_REG(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6d7dcd3972a162627bc3470cbf992ec4}{CR1}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga2e159d36ab2c93a2c1942df60e9eebbe}{USART\_CR1\_PS}}\ |\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga60f8fcf084f9a8514efafb617c70b074}{USART\_CR1\_PCE}}\ |\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga95f0288b9c6aaeca7cb6550a2e6833e2}{USART\_CR1\_M}},\ Parity\ |\ DataWidth);}
\DoxyCodeLine{01357\ \ \ MODIFY\_REG(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_aa7ede2de6204c3fc4bd9fb328801c99a}{CR2}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gaf993e483318ebcecffd18649de766dc6}{USART\_CR2\_STOP}},\ StopBits);}
\DoxyCodeLine{01358\ \}}
\DoxyCodeLine{01359\ }
\DoxyCodeLine{01369\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_SetTXRXSwap(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx,\ uint32\_t\ SwapConfig)}
\DoxyCodeLine{01370\ \{}
\DoxyCodeLine{01371\ \ \ MODIFY\_REG(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_aa7ede2de6204c3fc4bd9fb328801c99a}{CR2}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga4aecba5721df1c1adb6d0264625accad}{USART\_CR2\_SWAP}},\ SwapConfig);}
\DoxyCodeLine{01372\ \}}
\DoxyCodeLine{01373\ }
\DoxyCodeLine{01382\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_USART\_GetTXRXSwap(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{01383\ \{}
\DoxyCodeLine{01384\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_aa7ede2de6204c3fc4bd9fb328801c99a}{CR2}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga4aecba5721df1c1adb6d0264625accad}{USART\_CR2\_SWAP}}));}
\DoxyCodeLine{01385\ \}}
\DoxyCodeLine{01386\ }
\DoxyCodeLine{01396\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_SetRXPinLevel(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx,\ uint32\_t\ PinInvMethod)}
\DoxyCodeLine{01397\ \{}
\DoxyCodeLine{01398\ \ \ MODIFY\_REG(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_aa7ede2de6204c3fc4bd9fb328801c99a}{CR2}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gafff10115e1adb07c00f42627cedf01e5}{USART\_CR2\_RXINV}},\ PinInvMethod);}
\DoxyCodeLine{01399\ \}}
\DoxyCodeLine{01400\ }
\DoxyCodeLine{01409\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_USART\_GetRXPinLevel(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{01410\ \{}
\DoxyCodeLine{01411\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_aa7ede2de6204c3fc4bd9fb328801c99a}{CR2}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gafff10115e1adb07c00f42627cedf01e5}{USART\_CR2\_RXINV}}));}
\DoxyCodeLine{01412\ \}}
\DoxyCodeLine{01413\ }
\DoxyCodeLine{01423\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_SetTXPinLevel(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx,\ uint32\_t\ PinInvMethod)}
\DoxyCodeLine{01424\ \{}
\DoxyCodeLine{01425\ \ \ MODIFY\_REG(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_aa7ede2de6204c3fc4bd9fb328801c99a}{CR2}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gadc2ad93cdc6d8f138f455a2fb671a211}{USART\_CR2\_TXINV}},\ PinInvMethod);}
\DoxyCodeLine{01426\ \}}
\DoxyCodeLine{01427\ }
\DoxyCodeLine{01436\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_USART\_GetTXPinLevel(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{01437\ \{}
\DoxyCodeLine{01438\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_aa7ede2de6204c3fc4bd9fb328801c99a}{CR2}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gadc2ad93cdc6d8f138f455a2fb671a211}{USART\_CR2\_TXINV}}));}
\DoxyCodeLine{01439\ \}}
\DoxyCodeLine{01440\ }
\DoxyCodeLine{01452\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_SetBinaryDataLogic(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx,\ uint32\_t\ DataLogic)}
\DoxyCodeLine{01453\ \{}
\DoxyCodeLine{01454\ \ \ MODIFY\_REG(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_aa7ede2de6204c3fc4bd9fb328801c99a}{CR2}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga8f743bbd3df209bd1d434b17e08a78fe}{USART\_CR2\_DATAINV}},\ DataLogic);}
\DoxyCodeLine{01455\ \}}
\DoxyCodeLine{01456\ }
\DoxyCodeLine{01465\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_USART\_GetBinaryDataLogic(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{01466\ \{}
\DoxyCodeLine{01467\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_aa7ede2de6204c3fc4bd9fb328801c99a}{CR2}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga8f743bbd3df209bd1d434b17e08a78fe}{USART\_CR2\_DATAINV}}));}
\DoxyCodeLine{01468\ \}}
\DoxyCodeLine{01469\ }
\DoxyCodeLine{01481\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_SetTransferBitOrder(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx,\ uint32\_t\ BitOrder)}
\DoxyCodeLine{01482\ \{}
\DoxyCodeLine{01483\ \ \ MODIFY\_REG(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_aa7ede2de6204c3fc4bd9fb328801c99a}{CR2}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga7342ab16574cebf157aa885a79986812}{USART\_CR2\_MSBFIRST}},\ BitOrder);}
\DoxyCodeLine{01484\ \}}
\DoxyCodeLine{01485\ }
\DoxyCodeLine{01496\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_USART\_GetTransferBitOrder(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{01497\ \{}
\DoxyCodeLine{01498\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_aa7ede2de6204c3fc4bd9fb328801c99a}{CR2}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga7342ab16574cebf157aa885a79986812}{USART\_CR2\_MSBFIRST}}));}
\DoxyCodeLine{01499\ \}}
\DoxyCodeLine{01500\ }
\DoxyCodeLine{01509\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_EnableAutoBaudRate(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{01510\ \{}
\DoxyCodeLine{01511\ \ \ SET\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_aa7ede2de6204c3fc4bd9fb328801c99a}{CR2}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gaaa290a89959d43fecf43f89d66123a0a}{USART\_CR2\_ABREN}});}
\DoxyCodeLine{01512\ \}}
\DoxyCodeLine{01513\ }
\DoxyCodeLine{01522\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_DisableAutoBaudRate(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{01523\ \{}
\DoxyCodeLine{01524\ \ \ CLEAR\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_aa7ede2de6204c3fc4bd9fb328801c99a}{CR2}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gaaa290a89959d43fecf43f89d66123a0a}{USART\_CR2\_ABREN}});}
\DoxyCodeLine{01525\ \}}
\DoxyCodeLine{01526\ }
\DoxyCodeLine{01535\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_USART\_IsEnabledAutoBaud(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{01536\ \{}
\DoxyCodeLine{01537\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_aa7ede2de6204c3fc4bd9fb328801c99a}{CR2}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gaaa290a89959d43fecf43f89d66123a0a}{USART\_CR2\_ABREN}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_gaaa290a89959d43fecf43f89d66123a0a}{USART\_CR2\_ABREN}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{01538\ \}}
\DoxyCodeLine{01539\ }
\DoxyCodeLine{01553\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_SetAutoBaudRateMode(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx,\ uint32\_t\ AutoBaudRateMode)}
\DoxyCodeLine{01554\ \{}
\DoxyCodeLine{01555\ \ \ MODIFY\_REG(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_aa7ede2de6204c3fc4bd9fb328801c99a}{CR2}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga7b0a61926b32b1bbe136944c4133d2be}{USART\_CR2\_ABRMODE}},\ AutoBaudRateMode);}
\DoxyCodeLine{01556\ \}}
\DoxyCodeLine{01557\ }
\DoxyCodeLine{01570\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_USART\_GetAutoBaudRateMode(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{01571\ \{}
\DoxyCodeLine{01572\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_aa7ede2de6204c3fc4bd9fb328801c99a}{CR2}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga7b0a61926b32b1bbe136944c4133d2be}{USART\_CR2\_ABRMODE}}));}
\DoxyCodeLine{01573\ \}}
\DoxyCodeLine{01574\ }
\DoxyCodeLine{01581\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_EnableRxTimeout(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{01582\ \{}
\DoxyCodeLine{01583\ \ \ SET\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_aa7ede2de6204c3fc4bd9fb328801c99a}{CR2}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gab89524eda63950f55bc47208a66b7dca}{USART\_CR2\_RTOEN}});}
\DoxyCodeLine{01584\ \}}
\DoxyCodeLine{01585\ }
\DoxyCodeLine{01592\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_DisableRxTimeout(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{01593\ \{}
\DoxyCodeLine{01594\ \ \ CLEAR\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_aa7ede2de6204c3fc4bd9fb328801c99a}{CR2}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gab89524eda63950f55bc47208a66b7dca}{USART\_CR2\_RTOEN}});}
\DoxyCodeLine{01595\ \}}
\DoxyCodeLine{01596\ }
\DoxyCodeLine{01603\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_USART\_IsEnabledRxTimeout(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{01604\ \{}
\DoxyCodeLine{01605\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_aa7ede2de6204c3fc4bd9fb328801c99a}{CR2}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gab89524eda63950f55bc47208a66b7dca}{USART\_CR2\_RTOEN}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_gab89524eda63950f55bc47208a66b7dca}{USART\_CR2\_RTOEN}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{01606\ \}}
\DoxyCodeLine{01607\ }
\DoxyCodeLine{01631\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_ConfigNodeAddress(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx,\ uint32\_t\ AddressLen,\ uint32\_t\ NodeAddress)}
\DoxyCodeLine{01632\ \{}
\DoxyCodeLine{01633\ \ \ MODIFY\_REG(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_aa7ede2de6204c3fc4bd9fb328801c99a}{CR2}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga3ee77fac25142271ad56d49685e518b3}{USART\_CR2\_ADD}}\ |\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga2d8588feb26d8b36054a060d6b691823}{USART\_CR2\_ADDM7}},}
\DoxyCodeLine{01634\ \ \ \ \ \ \ \ \ \ \ \ \ \ (uint32\_t)(AddressLen\ |\ (NodeAddress\ <<\ USART\_CR2\_ADD\_Pos)));}
\DoxyCodeLine{01635\ \}}
\DoxyCodeLine{01636\ }
\DoxyCodeLine{01647\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_USART\_GetNodeAddress(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{01648\ \{}
\DoxyCodeLine{01649\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_aa7ede2de6204c3fc4bd9fb328801c99a}{CR2}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga3ee77fac25142271ad56d49685e518b3}{USART\_CR2\_ADD}})\ >>\ USART\_CR2\_ADD\_Pos);}
\DoxyCodeLine{01650\ \}}
\DoxyCodeLine{01651\ }
\DoxyCodeLine{01660\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_USART\_GetNodeAddressLen(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{01661\ \{}
\DoxyCodeLine{01662\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_aa7ede2de6204c3fc4bd9fb328801c99a}{CR2}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga2d8588feb26d8b36054a060d6b691823}{USART\_CR2\_ADDM7}}));}
\DoxyCodeLine{01663\ \}}
\DoxyCodeLine{01664\ }
\DoxyCodeLine{01673\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_EnableRTSHWFlowCtrl(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{01674\ \{}
\DoxyCodeLine{01675\ \ \ SET\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga7c5d6fcd84a4728cda578a0339b4cac2}{USART\_CR3\_RTSE}});}
\DoxyCodeLine{01676\ \}}
\DoxyCodeLine{01677\ }
\DoxyCodeLine{01686\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_DisableRTSHWFlowCtrl(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{01687\ \{}
\DoxyCodeLine{01688\ \ \ CLEAR\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga7c5d6fcd84a4728cda578a0339b4cac2}{USART\_CR3\_RTSE}});}
\DoxyCodeLine{01689\ \}}
\DoxyCodeLine{01690\ }
\DoxyCodeLine{01699\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_EnableCTSHWFlowCtrl(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{01700\ \{}
\DoxyCodeLine{01701\ \ \ SET\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gaa125f026b1ca2d76eab48b191baed265}{USART\_CR3\_CTSE}});}
\DoxyCodeLine{01702\ \}}
\DoxyCodeLine{01703\ }
\DoxyCodeLine{01712\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_DisableCTSHWFlowCtrl(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{01713\ \{}
\DoxyCodeLine{01714\ \ \ CLEAR\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gaa125f026b1ca2d76eab48b191baed265}{USART\_CR3\_CTSE}});}
\DoxyCodeLine{01715\ \}}
\DoxyCodeLine{01716\ }
\DoxyCodeLine{01731\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_SetHWFlowCtrl(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx,\ uint32\_t\ HardwareFlowControl)}
\DoxyCodeLine{01732\ \{}
\DoxyCodeLine{01733\ \ \ MODIFY\_REG(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga7c5d6fcd84a4728cda578a0339b4cac2}{USART\_CR3\_RTSE}}\ |\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gaa125f026b1ca2d76eab48b191baed265}{USART\_CR3\_CTSE}},\ HardwareFlowControl);}
\DoxyCodeLine{01734\ \}}
\DoxyCodeLine{01735\ }
\DoxyCodeLine{01749\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_USART\_GetHWFlowCtrl(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{01750\ \{}
\DoxyCodeLine{01751\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga7c5d6fcd84a4728cda578a0339b4cac2}{USART\_CR3\_RTSE}}\ |\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gaa125f026b1ca2d76eab48b191baed265}{USART\_CR3\_CTSE}}));}
\DoxyCodeLine{01752\ \}}
\DoxyCodeLine{01753\ }
\DoxyCodeLine{01760\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_EnableOneBitSamp(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{01761\ \{}
\DoxyCodeLine{01762\ \ \ SET\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga9a96fb1a7beab602cbc8cb0393593826}{USART\_CR3\_ONEBIT}});}
\DoxyCodeLine{01763\ \}}
\DoxyCodeLine{01764\ }
\DoxyCodeLine{01771\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_DisableOneBitSamp(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{01772\ \{}
\DoxyCodeLine{01773\ \ \ CLEAR\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga9a96fb1a7beab602cbc8cb0393593826}{USART\_CR3\_ONEBIT}});}
\DoxyCodeLine{01774\ \}}
\DoxyCodeLine{01775\ }
\DoxyCodeLine{01782\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_USART\_IsEnabledOneBitSamp(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{01783\ \{}
\DoxyCodeLine{01784\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga9a96fb1a7beab602cbc8cb0393593826}{USART\_CR3\_ONEBIT}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga9a96fb1a7beab602cbc8cb0393593826}{USART\_CR3\_ONEBIT}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{01785\ \}}
\DoxyCodeLine{01786\ }
\DoxyCodeLine{01793\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_EnableOverrunDetect(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{01794\ \{}
\DoxyCodeLine{01795\ \ \ CLEAR\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga33d63c7953788124179cd18a8890a91a}{USART\_CR3\_OVRDIS}});}
\DoxyCodeLine{01796\ \}}
\DoxyCodeLine{01797\ }
\DoxyCodeLine{01804\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_DisableOverrunDetect(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{01805\ \{}
\DoxyCodeLine{01806\ \ \ SET\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga33d63c7953788124179cd18a8890a91a}{USART\_CR3\_OVRDIS}});}
\DoxyCodeLine{01807\ \}}
\DoxyCodeLine{01808\ }
\DoxyCodeLine{01815\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_USART\_IsEnabledOverrunDetect(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{01816\ \{}
\DoxyCodeLine{01817\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga33d63c7953788124179cd18a8890a91a}{USART\_CR3\_OVRDIS}})\ !=\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga33d63c7953788124179cd18a8890a91a}{USART\_CR3\_OVRDIS}})\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{01818\ \}}
\DoxyCodeLine{01819\ }
\DoxyCodeLine{01832\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_SetWKUPType(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx,\ uint32\_t\ Type)}
\DoxyCodeLine{01833\ \{}
\DoxyCodeLine{01834\ \ \ MODIFY\_REG(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga76d102b464f15cbe18b0d83b61150293}{USART\_CR3\_WUS}},\ Type);}
\DoxyCodeLine{01835\ \}}
\DoxyCodeLine{01836\ }
\DoxyCodeLine{01848\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_USART\_GetWKUPType(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{01849\ \{}
\DoxyCodeLine{01850\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga76d102b464f15cbe18b0d83b61150293}{USART\_CR3\_WUS}}));}
\DoxyCodeLine{01851\ \}}
\DoxyCodeLine{01852\ }
\DoxyCodeLine{01882\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_SetBaudRate(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx,\ uint32\_t\ PeriphClk,\ uint32\_t\ PrescalerValue,}
\DoxyCodeLine{01883\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ uint32\_t\ OverSampling,}
\DoxyCodeLine{01884\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ uint32\_t\ BaudRate)}
\DoxyCodeLine{01885\ \{}
\DoxyCodeLine{01886\ \ \ uint32\_t\ usartdiv;}
\DoxyCodeLine{01887\ \ \ uint32\_t\ brrtemp;}
\DoxyCodeLine{01888\ }
\DoxyCodeLine{01889\ \ \ \textcolor{keywordflow}{if}\ (PrescalerValue\ >\ LL\_USART\_PRESCALER\_DIV256)}
\DoxyCodeLine{01890\ \ \ \{}
\DoxyCodeLine{01891\ \ \ \ \ \textcolor{comment}{/*\ Do\ not\ overstep\ the\ size\ of\ USART\_PRESCALER\_TAB\ */}}
\DoxyCodeLine{01892\ \ \ \}}
\DoxyCodeLine{01893\ \ \ \textcolor{keywordflow}{else}\ \textcolor{keywordflow}{if}\ (BaudRate\ ==\ 0U)}
\DoxyCodeLine{01894\ \ \ \{}
\DoxyCodeLine{01895\ \ \ \ \ \textcolor{comment}{/*\ Can\ Not\ divide\ per\ 0\ */}}
\DoxyCodeLine{01896\ \ \ \}}
\DoxyCodeLine{01897\ \ \ \textcolor{keywordflow}{else}\ \textcolor{keywordflow}{if}\ (OverSampling\ ==\ LL\_USART\_OVERSAMPLING\_8)}
\DoxyCodeLine{01898\ \ \ \{}
\DoxyCodeLine{01899\ \ \ \ \ usartdiv\ =\ (uint16\_t)(\_\_LL\_USART\_DIV\_SAMPLING8(PeriphClk,\ (uint8\_t)PrescalerValue,\ BaudRate));}
\DoxyCodeLine{01900\ \ \ \ \ brrtemp\ =\ usartdiv\ \&\ 0xFFF0U;}
\DoxyCodeLine{01901\ \ \ \ \ brrtemp\ |=\ (uint16\_t)((usartdiv\ \&\ (uint16\_t)0x000FU)\ >>\ 1U);}
\DoxyCodeLine{01902\ \ \ \ \ USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6ef06ba9d8dc2dc2a0855766369fa7c9}{BRR}}\ =\ brrtemp;}
\DoxyCodeLine{01903\ \ \ \}}
\DoxyCodeLine{01904\ \ \ \textcolor{keywordflow}{else}}
\DoxyCodeLine{01905\ \ \ \{}
\DoxyCodeLine{01906\ \ \ \ \ USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6ef06ba9d8dc2dc2a0855766369fa7c9}{BRR}}\ =\ (uint16\_t)(\_\_LL\_USART\_DIV\_SAMPLING16(PeriphClk,\ (uint8\_t)PrescalerValue,\ BaudRate));}
\DoxyCodeLine{01907\ \ \ \}}
\DoxyCodeLine{01908\ \}}
\DoxyCodeLine{01909\ }
\DoxyCodeLine{01936\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_USART\_GetBaudRate(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx,\ uint32\_t\ PeriphClk,\ uint32\_t\ PrescalerValue,}
\DoxyCodeLine{01937\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ uint32\_t\ OverSampling)}
\DoxyCodeLine{01938\ \{}
\DoxyCodeLine{01939\ \ \ uint32\_t\ usartdiv;}
\DoxyCodeLine{01940\ \ \ uint32\_t\ brrresult\ =\ 0x0U;}
\DoxyCodeLine{01941\ \ \ uint32\_t\ periphclkpresc\ =\ (uint32\_t)(PeriphClk\ /\ (USART\_PRESCALER\_TAB[(uint8\_t)PrescalerValue]));}
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\DoxyCodeLine{01944\ }
\DoxyCodeLine{01945\ \ \ \textcolor{keywordflow}{if}\ (usartdiv\ ==\ 0U)}
\DoxyCodeLine{01946\ \ \ \{}
\DoxyCodeLine{01947\ \ \ \ \ \textcolor{comment}{/*\ Do\ not\ perform\ a\ division\ by\ 0\ */}}
\DoxyCodeLine{01948\ \ \ \}}
\DoxyCodeLine{01949\ \ \ \textcolor{keywordflow}{else}\ \textcolor{keywordflow}{if}\ (OverSampling\ ==\ LL\_USART\_OVERSAMPLING\_8)}
\DoxyCodeLine{01950\ \ \ \{}
\DoxyCodeLine{01951\ \ \ \ \ usartdiv\ =\ (uint16\_t)((usartdiv\ \&\ 0xFFF0U)\ |\ ((usartdiv\ \&\ 0x0007U)\ <<\ 1U))\ ;}
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\DoxyCodeLine{01953\ \ \ \ \ \{}
\DoxyCodeLine{01954\ \ \ \ \ \ \ brrresult\ =\ (periphclkpresc\ *\ 2U)\ /\ usartdiv;}
\DoxyCodeLine{01955\ \ \ \ \ \}}
\DoxyCodeLine{01956\ \ \ \}}
\DoxyCodeLine{01957\ \ \ \textcolor{keywordflow}{else}}
\DoxyCodeLine{01958\ \ \ \{}
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\DoxyCodeLine{01960\ \ \ \ \ \{}
\DoxyCodeLine{01961\ \ \ \ \ \ \ brrresult\ =\ periphclkpresc\ /\ usartdiv;}
\DoxyCodeLine{01962\ \ \ \ \ \}}
\DoxyCodeLine{01963\ \ \ \}}
\DoxyCodeLine{01964\ \ \ \textcolor{keywordflow}{return}\ (brrresult);}
\DoxyCodeLine{01965\ \}}
\DoxyCodeLine{01966\ }
\DoxyCodeLine{01974\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_SetRxTimeout(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx,\ uint32\_t\ Timeout)}
\DoxyCodeLine{01975\ \{}
\DoxyCodeLine{01976\ \ \ MODIFY\_REG(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a5732c379e1ce532552e80392db4eabf8}{RTOR}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga5f6cdc5aefbbb5959a978588c1a6047e}{USART\_RTOR\_RTO}},\ Timeout);}
\DoxyCodeLine{01977\ \}}
\DoxyCodeLine{01978\ }
\DoxyCodeLine{01985\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_USART\_GetRxTimeout(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{01986\ \{}
\DoxyCodeLine{01987\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a5732c379e1ce532552e80392db4eabf8}{RTOR}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga5f6cdc5aefbbb5959a978588c1a6047e}{USART\_RTOR\_RTO}}));}
\DoxyCodeLine{01988\ \}}
\DoxyCodeLine{01989\ }
\DoxyCodeLine{01997\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_SetBlockLength(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx,\ uint32\_t\ BlockLength)}
\DoxyCodeLine{01998\ \{}
\DoxyCodeLine{01999\ \ \ MODIFY\_REG(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a5732c379e1ce532552e80392db4eabf8}{RTOR}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga14f65309076ce671d0efac5265eb276d}{USART\_RTOR\_BLEN}},\ BlockLength\ <<\ USART\_RTOR\_BLEN\_Pos);}
\DoxyCodeLine{02000\ \}}
\DoxyCodeLine{02001\ }
\DoxyCodeLine{02008\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_USART\_GetBlockLength(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{02009\ \{}
\DoxyCodeLine{02010\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a5732c379e1ce532552e80392db4eabf8}{RTOR}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga14f65309076ce671d0efac5265eb276d}{USART\_RTOR\_BLEN}})\ >>\ USART\_RTOR\_BLEN\_Pos);}
\DoxyCodeLine{02011\ \}}
\DoxyCodeLine{02012\ }
\DoxyCodeLine{02016\ }
\DoxyCodeLine{02020\ }
\DoxyCodeLine{02029\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_EnableIrda(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{02030\ \{}
\DoxyCodeLine{02031\ \ \ SET\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga31c66373bfbae7724c836ac63b8411dd}{USART\_CR3\_IREN}});}
\DoxyCodeLine{02032\ \}}
\DoxyCodeLine{02033\ }
\DoxyCodeLine{02042\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_DisableIrda(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{02043\ \{}
\DoxyCodeLine{02044\ \ \ CLEAR\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga31c66373bfbae7724c836ac63b8411dd}{USART\_CR3\_IREN}});}
\DoxyCodeLine{02045\ \}}
\DoxyCodeLine{02046\ }
\DoxyCodeLine{02055\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_USART\_IsEnabledIrda(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{02056\ \{}
\DoxyCodeLine{02057\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga31c66373bfbae7724c836ac63b8411dd}{USART\_CR3\_IREN}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga31c66373bfbae7724c836ac63b8411dd}{USART\_CR3\_IREN}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{02058\ \}}
\DoxyCodeLine{02059\ }
\DoxyCodeLine{02071\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_SetIrdaPowerMode(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx,\ uint32\_t\ PowerMode)}
\DoxyCodeLine{02072\ \{}
\DoxyCodeLine{02073\ \ \ MODIFY\_REG(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga22af8d399f1adda62e31186f0309af80}{USART\_CR3\_IRLP}},\ PowerMode);}
\DoxyCodeLine{02074\ \}}
\DoxyCodeLine{02075\ }
\DoxyCodeLine{02086\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_USART\_GetIrdaPowerMode(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{02087\ \{}
\DoxyCodeLine{02088\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga22af8d399f1adda62e31186f0309af80}{USART\_CR3\_IRLP}}));}
\DoxyCodeLine{02089\ \}}
\DoxyCodeLine{02090\ }
\DoxyCodeLine{02101\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_SetIrdaPrescaler(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx,\ uint32\_t\ PrescalerValue)}
\DoxyCodeLine{02102\ \{}
\DoxyCodeLine{02103\ \ \ MODIFY\_REG(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_ae23acff49b4ff96fd29093e80fc7d72e}{GTPR}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gaa0b423f0f4baf7d510ea70477e5c9203}{USART\_GTPR\_PSC}},\ (uint16\_t)PrescalerValue);}
\DoxyCodeLine{02104\ \}}
\DoxyCodeLine{02105\ }
\DoxyCodeLine{02115\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_USART\_GetIrdaPrescaler(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{02116\ \{}
\DoxyCodeLine{02117\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_ae23acff49b4ff96fd29093e80fc7d72e}{GTPR}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gaa0b423f0f4baf7d510ea70477e5c9203}{USART\_GTPR\_PSC}}));}
\DoxyCodeLine{02118\ \}}
\DoxyCodeLine{02119\ }
\DoxyCodeLine{02123\ }
\DoxyCodeLine{02127\ }
\DoxyCodeLine{02136\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_EnableSmartcardNACK(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{02137\ \{}
\DoxyCodeLine{02138\ \ \ SET\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga3f3b70b2ee9ff0b59e952fd7ab04373c}{USART\_CR3\_NACK}});}
\DoxyCodeLine{02139\ \}}
\DoxyCodeLine{02140\ }
\DoxyCodeLine{02149\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_DisableSmartcardNACK(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{02150\ \{}
\DoxyCodeLine{02151\ \ \ CLEAR\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga3f3b70b2ee9ff0b59e952fd7ab04373c}{USART\_CR3\_NACK}});}
\DoxyCodeLine{02152\ \}}
\DoxyCodeLine{02153\ }
\DoxyCodeLine{02162\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_USART\_IsEnabledSmartcardNACK(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{02163\ \{}
\DoxyCodeLine{02164\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga3f3b70b2ee9ff0b59e952fd7ab04373c}{USART\_CR3\_NACK}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga3f3b70b2ee9ff0b59e952fd7ab04373c}{USART\_CR3\_NACK}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{02165\ \}}
\DoxyCodeLine{02166\ }
\DoxyCodeLine{02175\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_EnableSmartcard(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{02176\ \{}
\DoxyCodeLine{02177\ \ \ SET\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga9180b9249a26988f71d4bb2b0c3eec27}{USART\_CR3\_SCEN}});}
\DoxyCodeLine{02178\ \}}
\DoxyCodeLine{02179\ }
\DoxyCodeLine{02188\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_DisableSmartcard(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{02189\ \{}
\DoxyCodeLine{02190\ \ \ CLEAR\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga9180b9249a26988f71d4bb2b0c3eec27}{USART\_CR3\_SCEN}});}
\DoxyCodeLine{02191\ \}}
\DoxyCodeLine{02192\ }
\DoxyCodeLine{02201\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_USART\_IsEnabledSmartcard(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{02202\ \{}
\DoxyCodeLine{02203\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga9180b9249a26988f71d4bb2b0c3eec27}{USART\_CR3\_SCEN}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga9180b9249a26988f71d4bb2b0c3eec27}{USART\_CR3\_SCEN}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{02204\ \}}
\DoxyCodeLine{02205\ }
\DoxyCodeLine{02220\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_SetSmartcardAutoRetryCount(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx,\ uint32\_t\ AutoRetryCount)}
\DoxyCodeLine{02221\ \{}
\DoxyCodeLine{02222\ \ \ MODIFY\_REG(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gac63401e737dd8c4ac061a67e092fbece}{USART\_CR3\_SCARCNT}},\ AutoRetryCount\ <<\ USART\_CR3\_SCARCNT\_Pos);}
\DoxyCodeLine{02223\ \}}
\DoxyCodeLine{02224\ }
\DoxyCodeLine{02233\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_USART\_GetSmartcardAutoRetryCount(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{02234\ \{}
\DoxyCodeLine{02235\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gac63401e737dd8c4ac061a67e092fbece}{USART\_CR3\_SCARCNT}})\ >>\ USART\_CR3\_SCARCNT\_Pos);}
\DoxyCodeLine{02236\ \}}
\DoxyCodeLine{02237\ }
\DoxyCodeLine{02248\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_SetSmartcardPrescaler(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx,\ uint32\_t\ PrescalerValue)}
\DoxyCodeLine{02249\ \{}
\DoxyCodeLine{02250\ \ \ MODIFY\_REG(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_ae23acff49b4ff96fd29093e80fc7d72e}{GTPR}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gaa0b423f0f4baf7d510ea70477e5c9203}{USART\_GTPR\_PSC}},\ (uint16\_t)PrescalerValue);}
\DoxyCodeLine{02251\ \}}
\DoxyCodeLine{02252\ }
\DoxyCodeLine{02262\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_USART\_GetSmartcardPrescaler(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{02263\ \{}
\DoxyCodeLine{02264\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_ae23acff49b4ff96fd29093e80fc7d72e}{GTPR}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gaa0b423f0f4baf7d510ea70477e5c9203}{USART\_GTPR\_PSC}}));}
\DoxyCodeLine{02265\ \}}
\DoxyCodeLine{02266\ }
\DoxyCodeLine{02277\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_SetSmartcardGuardTime(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx,\ uint32\_t\ GuardTime)}
\DoxyCodeLine{02278\ \{}
\DoxyCodeLine{02279\ \ \ MODIFY\_REG(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_ae23acff49b4ff96fd29093e80fc7d72e}{GTPR}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga8e927fad0bfa430f54007e158e01f43b}{USART\_GTPR\_GT}},\ (uint16\_t)(GuardTime\ <<\ USART\_GTPR\_GT\_Pos));}
\DoxyCodeLine{02280\ \}}
\DoxyCodeLine{02281\ }
\DoxyCodeLine{02291\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_USART\_GetSmartcardGuardTime(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{02292\ \{}
\DoxyCodeLine{02293\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_ae23acff49b4ff96fd29093e80fc7d72e}{GTPR}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga8e927fad0bfa430f54007e158e01f43b}{USART\_GTPR\_GT}})\ >>\ USART\_GTPR\_GT\_Pos);}
\DoxyCodeLine{02294\ \}}
\DoxyCodeLine{02295\ }
\DoxyCodeLine{02299\ }
\DoxyCodeLine{02303\ }
\DoxyCodeLine{02312\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_EnableHalfDuplex(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{02313\ \{}
\DoxyCodeLine{02314\ \ \ SET\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gac71129810fab0b46d91161a39e3f8d01}{USART\_CR3\_HDSEL}});}
\DoxyCodeLine{02315\ \}}
\DoxyCodeLine{02316\ }
\DoxyCodeLine{02325\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_DisableHalfDuplex(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{02326\ \{}
\DoxyCodeLine{02327\ \ \ CLEAR\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gac71129810fab0b46d91161a39e3f8d01}{USART\_CR3\_HDSEL}});}
\DoxyCodeLine{02328\ \}}
\DoxyCodeLine{02329\ }
\DoxyCodeLine{02338\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_USART\_IsEnabledHalfDuplex(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{02339\ \{}
\DoxyCodeLine{02340\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gac71129810fab0b46d91161a39e3f8d01}{USART\_CR3\_HDSEL}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_gac71129810fab0b46d91161a39e3f8d01}{USART\_CR3\_HDSEL}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{02341\ \}}
\DoxyCodeLine{02342\ }
\DoxyCodeLine{02346\ }
\DoxyCodeLine{02358\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_EnableSPISlave(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{02359\ \{}
\DoxyCodeLine{02360\ \ \ SET\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_aa7ede2de6204c3fc4bd9fb328801c99a}{CR2}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga134485f9d7bc55e1e42ed5b9ad2aa63c}{USART\_CR2\_SLVEN}});}
\DoxyCodeLine{02361\ \}}
\DoxyCodeLine{02362\ }
\DoxyCodeLine{02371\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_DisableSPISlave(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{02372\ \{}
\DoxyCodeLine{02373\ \ \ CLEAR\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_aa7ede2de6204c3fc4bd9fb328801c99a}{CR2}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga134485f9d7bc55e1e42ed5b9ad2aa63c}{USART\_CR2\_SLVEN}});}
\DoxyCodeLine{02374\ \}}
\DoxyCodeLine{02375\ }
\DoxyCodeLine{02384\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_USART\_IsEnabledSPISlave(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{02385\ \{}
\DoxyCodeLine{02386\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_aa7ede2de6204c3fc4bd9fb328801c99a}{CR2}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga134485f9d7bc55e1e42ed5b9ad2aa63c}{USART\_CR2\_SLVEN}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga134485f9d7bc55e1e42ed5b9ad2aa63c}{USART\_CR2\_SLVEN}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{02387\ \}}
\DoxyCodeLine{02388\ }
\DoxyCodeLine{02399\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_EnableSPISlaveSelect(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{02400\ \{}
\DoxyCodeLine{02401\ \ \ CLEAR\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_aa7ede2de6204c3fc4bd9fb328801c99a}{CR2}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gad2def80ad9addd71c47ae109056bd19b}{USART\_CR2\_DIS\_NSS}});}
\DoxyCodeLine{02402\ \}}
\DoxyCodeLine{02403\ }
\DoxyCodeLine{02413\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_DisableSPISlaveSelect(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{02414\ \{}
\DoxyCodeLine{02415\ \ \ SET\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_aa7ede2de6204c3fc4bd9fb328801c99a}{CR2}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gad2def80ad9addd71c47ae109056bd19b}{USART\_CR2\_DIS\_NSS}});}
\DoxyCodeLine{02416\ \}}
\DoxyCodeLine{02417\ }
\DoxyCodeLine{02426\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_USART\_IsEnabledSPISlaveSelect(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{02427\ \{}
\DoxyCodeLine{02428\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_aa7ede2de6204c3fc4bd9fb328801c99a}{CR2}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gad2def80ad9addd71c47ae109056bd19b}{USART\_CR2\_DIS\_NSS}})\ !=\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_gad2def80ad9addd71c47ae109056bd19b}{USART\_CR2\_DIS\_NSS}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{02429\ \}}
\DoxyCodeLine{02430\ }
\DoxyCodeLine{02434\ }
\DoxyCodeLine{02438\ }
\DoxyCodeLine{02450\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_SetLINBrkDetectionLen(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx,\ uint32\_t\ LINBDLength)}
\DoxyCodeLine{02451\ \{}
\DoxyCodeLine{02452\ \ \ MODIFY\_REG(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_aa7ede2de6204c3fc4bd9fb328801c99a}{CR2}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga7f9bc41700717fd93548e0e95b6072ed}{USART\_CR2\_LBDL}},\ LINBDLength);}
\DoxyCodeLine{02453\ \}}
\DoxyCodeLine{02454\ }
\DoxyCodeLine{02465\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_USART\_GetLINBrkDetectionLen(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{02466\ \{}
\DoxyCodeLine{02467\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_aa7ede2de6204c3fc4bd9fb328801c99a}{CR2}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga7f9bc41700717fd93548e0e95b6072ed}{USART\_CR2\_LBDL}}));}
\DoxyCodeLine{02468\ \}}
\DoxyCodeLine{02469\ }
\DoxyCodeLine{02478\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_EnableLIN(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{02479\ \{}
\DoxyCodeLine{02480\ \ \ SET\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_aa7ede2de6204c3fc4bd9fb328801c99a}{CR2}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gac8931efa62c29d92f5c0ec5a05f907ef}{USART\_CR2\_LINEN}});}
\DoxyCodeLine{02481\ \}}
\DoxyCodeLine{02482\ }
\DoxyCodeLine{02491\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_DisableLIN(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{02492\ \{}
\DoxyCodeLine{02493\ \ \ CLEAR\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_aa7ede2de6204c3fc4bd9fb328801c99a}{CR2}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gac8931efa62c29d92f5c0ec5a05f907ef}{USART\_CR2\_LINEN}});}
\DoxyCodeLine{02494\ \}}
\DoxyCodeLine{02495\ }
\DoxyCodeLine{02504\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_USART\_IsEnabledLIN(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{02505\ \{}
\DoxyCodeLine{02506\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_aa7ede2de6204c3fc4bd9fb328801c99a}{CR2}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gac8931efa62c29d92f5c0ec5a05f907ef}{USART\_CR2\_LINEN}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_gac8931efa62c29d92f5c0ec5a05f907ef}{USART\_CR2\_LINEN}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{02507\ \}}
\DoxyCodeLine{02508\ }
\DoxyCodeLine{02512\ }
\DoxyCodeLine{02516\ }
\DoxyCodeLine{02526\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_SetDEDeassertionTime(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx,\ uint32\_t\ Time)}
\DoxyCodeLine{02527\ \{}
\DoxyCodeLine{02528\ \ \ MODIFY\_REG(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6d7dcd3972a162627bc3470cbf992ec4}{CR1}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gab2d95af966e08146e1172c4b828bda38}{USART\_CR1\_DEDT}},\ Time\ <<\ USART\_CR1\_DEDT\_Pos);}
\DoxyCodeLine{02529\ \}}
\DoxyCodeLine{02530\ }
\DoxyCodeLine{02539\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_USART\_GetDEDeassertionTime(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{02540\ \{}
\DoxyCodeLine{02541\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6d7dcd3972a162627bc3470cbf992ec4}{CR1}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gab2d95af966e08146e1172c4b828bda38}{USART\_CR1\_DEDT}})\ >>\ USART\_CR1\_DEDT\_Pos);}
\DoxyCodeLine{02542\ \}}
\DoxyCodeLine{02543\ }
\DoxyCodeLine{02553\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_SetDEAssertionTime(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx,\ uint32\_t\ Time)}
\DoxyCodeLine{02554\ \{}
\DoxyCodeLine{02555\ \ \ MODIFY\_REG(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6d7dcd3972a162627bc3470cbf992ec4}{CR1}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga6bdc2e80e4545996ecb5901915d13e28}{USART\_CR1\_DEAT}},\ Time\ <<\ USART\_CR1\_DEAT\_Pos);}
\DoxyCodeLine{02556\ \}}
\DoxyCodeLine{02557\ }
\DoxyCodeLine{02566\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_USART\_GetDEAssertionTime(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{02567\ \{}
\DoxyCodeLine{02568\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a6d7dcd3972a162627bc3470cbf992ec4}{CR1}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga6bdc2e80e4545996ecb5901915d13e28}{USART\_CR1\_DEAT}})\ >>\ USART\_CR1\_DEAT\_Pos);}
\DoxyCodeLine{02569\ \}}
\DoxyCodeLine{02570\ }
\DoxyCodeLine{02579\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_EnableDEMode(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{02580\ \{}
\DoxyCodeLine{02581\ \ \ SET\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gacd65f9fd10ee8e99db1118828deb0441}{USART\_CR3\_DEM}});}
\DoxyCodeLine{02582\ \}}
\DoxyCodeLine{02583\ }
\DoxyCodeLine{02592\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_DisableDEMode(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{02593\ \{}
\DoxyCodeLine{02594\ \ \ CLEAR\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gacd65f9fd10ee8e99db1118828deb0441}{USART\_CR3\_DEM}});}
\DoxyCodeLine{02595\ \}}
\DoxyCodeLine{02596\ }
\DoxyCodeLine{02605\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_USART\_IsEnabledDEMode(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{02606\ \{}
\DoxyCodeLine{02607\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gacd65f9fd10ee8e99db1118828deb0441}{USART\_CR3\_DEM}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_gacd65f9fd10ee8e99db1118828deb0441}{USART\_CR3\_DEM}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{02608\ \}}
\DoxyCodeLine{02609\ }
\DoxyCodeLine{02621\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_SetDESignalPolarity(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx,\ uint32\_t\ Polarity)}
\DoxyCodeLine{02622\ \{}
\DoxyCodeLine{02623\ \ \ MODIFY\_REG(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga2000c42015289291da1c58fe27800d64}{USART\_CR3\_DEP}},\ Polarity);}
\DoxyCodeLine{02624\ \}}
\DoxyCodeLine{02625\ }
\DoxyCodeLine{02636\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_USART\_GetDESignalPolarity(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{02637\ \{}
\DoxyCodeLine{02638\ \ \ \textcolor{keywordflow}{return}\ (uint32\_t)(READ\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga2000c42015289291da1c58fe27800d64}{USART\_CR3\_DEP}}));}
\DoxyCodeLine{02639\ \}}
\DoxyCodeLine{02640\ }
\DoxyCodeLine{02644\ }
\DoxyCodeLine{02648\ }
\DoxyCodeLine{02674\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_ConfigAsyncMode(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{02675\ \{}
\DoxyCodeLine{02676\ \ \ \textcolor{comment}{/*\ In\ Asynchronous\ mode,\ the\ following\ bits\ must\ be\ kept\ cleared:}}
\DoxyCodeLine{02677\ \textcolor{comment}{\ \ -\/\ LINEN,\ CLKEN\ bits\ in\ the\ USART\_CR2\ register,}}
\DoxyCodeLine{02678\ \textcolor{comment}{\ \ -\/\ SCEN,\ IREN\ and\ HDSEL\ bits\ in\ the\ USART\_CR3\ register.}}
\DoxyCodeLine{02679\ \textcolor{comment}{\ \ */}}
\DoxyCodeLine{02680\ \ \ CLEAR\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_aa7ede2de6204c3fc4bd9fb328801c99a}{CR2}},\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_gac8931efa62c29d92f5c0ec5a05f907ef}{USART\_CR2\_LINEN}}\ |\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga42a396cde02ffa0c4d3fd9817b6af853}{USART\_CR2\_CLKEN}}));}
\DoxyCodeLine{02681\ \ \ CLEAR\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga9180b9249a26988f71d4bb2b0c3eec27}{USART\_CR3\_SCEN}}\ |\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga31c66373bfbae7724c836ac63b8411dd}{USART\_CR3\_IREN}}\ |\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gac71129810fab0b46d91161a39e3f8d01}{USART\_CR3\_HDSEL}}));}
\DoxyCodeLine{02682\ \}}
\DoxyCodeLine{02683\ }
\DoxyCodeLine{02711\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_ConfigSyncMode(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{02712\ \{}
\DoxyCodeLine{02713\ \ \ \textcolor{comment}{/*\ In\ Synchronous\ mode,\ the\ following\ bits\ must\ be\ kept\ cleared:}}
\DoxyCodeLine{02714\ \textcolor{comment}{\ \ -\/\ LINEN\ bit\ in\ the\ USART\_CR2\ register,}}
\DoxyCodeLine{02715\ \textcolor{comment}{\ \ -\/\ SCEN,\ IREN\ and\ HDSEL\ bits\ in\ the\ USART\_CR3\ register.}}
\DoxyCodeLine{02716\ \textcolor{comment}{\ \ */}}
\DoxyCodeLine{02717\ \ \ CLEAR\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_aa7ede2de6204c3fc4bd9fb328801c99a}{CR2}},\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_gac8931efa62c29d92f5c0ec5a05f907ef}{USART\_CR2\_LINEN}}));}
\DoxyCodeLine{02718\ \ \ CLEAR\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga9180b9249a26988f71d4bb2b0c3eec27}{USART\_CR3\_SCEN}}\ |\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga31c66373bfbae7724c836ac63b8411dd}{USART\_CR3\_IREN}}\ |\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gac71129810fab0b46d91161a39e3f8d01}{USART\_CR3\_HDSEL}}));}
\DoxyCodeLine{02719\ \ \ \textcolor{comment}{/*\ set\ the\ UART/USART\ in\ Synchronous\ mode\ */}}
\DoxyCodeLine{02720\ \ \ SET\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_aa7ede2de6204c3fc4bd9fb328801c99a}{CR2}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga42a396cde02ffa0c4d3fd9817b6af853}{USART\_CR2\_CLKEN}});}
\DoxyCodeLine{02721\ \}}
\DoxyCodeLine{02722\ }
\DoxyCodeLine{02752\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_ConfigLINMode(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{02753\ \{}
\DoxyCodeLine{02754\ \ \ \textcolor{comment}{/*\ In\ LIN\ mode,\ the\ following\ bits\ must\ be\ kept\ cleared:}}
\DoxyCodeLine{02755\ \textcolor{comment}{\ \ -\/\ STOP\ and\ CLKEN\ bits\ in\ the\ USART\_CR2\ register,}}
\DoxyCodeLine{02756\ \textcolor{comment}{\ \ -\/\ IREN,\ SCEN\ and\ HDSEL\ bits\ in\ the\ USART\_CR3\ register.}}
\DoxyCodeLine{02757\ \textcolor{comment}{\ \ */}}
\DoxyCodeLine{02758\ \ \ CLEAR\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_aa7ede2de6204c3fc4bd9fb328801c99a}{CR2}},\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga42a396cde02ffa0c4d3fd9817b6af853}{USART\_CR2\_CLKEN}}\ |\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gaf993e483318ebcecffd18649de766dc6}{USART\_CR2\_STOP}}));}
\DoxyCodeLine{02759\ \ \ CLEAR\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga31c66373bfbae7724c836ac63b8411dd}{USART\_CR3\_IREN}}\ |\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga9180b9249a26988f71d4bb2b0c3eec27}{USART\_CR3\_SCEN}}\ |\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gac71129810fab0b46d91161a39e3f8d01}{USART\_CR3\_HDSEL}}));}
\DoxyCodeLine{02760\ \ \ \textcolor{comment}{/*\ Set\ the\ UART/USART\ in\ LIN\ mode\ */}}
\DoxyCodeLine{02761\ \ \ SET\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_aa7ede2de6204c3fc4bd9fb328801c99a}{CR2}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gac8931efa62c29d92f5c0ec5a05f907ef}{USART\_CR2\_LINEN}});}
\DoxyCodeLine{02762\ \}}
\DoxyCodeLine{02763\ }
\DoxyCodeLine{02791\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_ConfigHalfDuplexMode(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{02792\ \{}
\DoxyCodeLine{02793\ \ \ \textcolor{comment}{/*\ In\ Half\ Duplex\ mode,\ the\ following\ bits\ must\ be\ kept\ cleared:}}
\DoxyCodeLine{02794\ \textcolor{comment}{\ \ -\/\ LINEN\ and\ CLKEN\ bits\ in\ the\ USART\_CR2\ register,}}
\DoxyCodeLine{02795\ \textcolor{comment}{\ \ -\/\ SCEN\ and\ IREN\ bits\ in\ the\ USART\_CR3\ register.}}
\DoxyCodeLine{02796\ \textcolor{comment}{\ \ */}}
\DoxyCodeLine{02797\ \ \ CLEAR\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_aa7ede2de6204c3fc4bd9fb328801c99a}{CR2}},\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_gac8931efa62c29d92f5c0ec5a05f907ef}{USART\_CR2\_LINEN}}\ |\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga42a396cde02ffa0c4d3fd9817b6af853}{USART\_CR2\_CLKEN}}));}
\DoxyCodeLine{02798\ \ \ CLEAR\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga9180b9249a26988f71d4bb2b0c3eec27}{USART\_CR3\_SCEN}}\ |\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga31c66373bfbae7724c836ac63b8411dd}{USART\_CR3\_IREN}}));}
\DoxyCodeLine{02799\ \ \ \textcolor{comment}{/*\ set\ the\ UART/USART\ in\ Half\ Duplex\ mode\ */}}
\DoxyCodeLine{02800\ \ \ SET\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gac71129810fab0b46d91161a39e3f8d01}{USART\_CR3\_HDSEL}});}
\DoxyCodeLine{02801\ \}}
\DoxyCodeLine{02802\ }
\DoxyCodeLine{02832\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_ConfigSmartcardMode(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{02833\ \{}
\DoxyCodeLine{02834\ \ \ \textcolor{comment}{/*\ In\ Smartcard\ mode,\ the\ following\ bits\ must\ be\ kept\ cleared:}}
\DoxyCodeLine{02835\ \textcolor{comment}{\ \ -\/\ LINEN\ bit\ in\ the\ USART\_CR2\ register,}}
\DoxyCodeLine{02836\ \textcolor{comment}{\ \ -\/\ IREN\ and\ HDSEL\ bits\ in\ the\ USART\_CR3\ register.}}
\DoxyCodeLine{02837\ \textcolor{comment}{\ \ */}}
\DoxyCodeLine{02838\ \ \ CLEAR\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_aa7ede2de6204c3fc4bd9fb328801c99a}{CR2}},\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_gac8931efa62c29d92f5c0ec5a05f907ef}{USART\_CR2\_LINEN}}));}
\DoxyCodeLine{02839\ \ \ CLEAR\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga31c66373bfbae7724c836ac63b8411dd}{USART\_CR3\_IREN}}\ |\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gac71129810fab0b46d91161a39e3f8d01}{USART\_CR3\_HDSEL}}));}
\DoxyCodeLine{02840\ \ \ \textcolor{comment}{/*\ Configure\ Stop\ bits\ to\ 1.5\ bits\ */}}
\DoxyCodeLine{02841\ \ \ \textcolor{comment}{/*\ Synchronous\ mode\ is\ activated\ by\ default\ */}}
\DoxyCodeLine{02842\ \ \ SET\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_aa7ede2de6204c3fc4bd9fb328801c99a}{CR2}},\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_gaee6ee01c6e5325b378b2209ef20d0a61}{USART\_CR2\_STOP\_0}}\ |\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga2b24d14f0e5d1c76c878b08aad44d02b}{USART\_CR2\_STOP\_1}}\ |\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga42a396cde02ffa0c4d3fd9817b6af853}{USART\_CR2\_CLKEN}}));}
\DoxyCodeLine{02843\ \ \ \textcolor{comment}{/*\ set\ the\ UART/USART\ in\ Smartcard\ mode\ */}}
\DoxyCodeLine{02844\ \ \ SET\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga9180b9249a26988f71d4bb2b0c3eec27}{USART\_CR3\_SCEN}});}
\DoxyCodeLine{02845\ \}}
\DoxyCodeLine{02846\ }
\DoxyCodeLine{02876\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_ConfigIrdaMode(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{02877\ \{}
\DoxyCodeLine{02878\ \ \ \textcolor{comment}{/*\ In\ IRDA\ mode,\ the\ following\ bits\ must\ be\ kept\ cleared:}}
\DoxyCodeLine{02879\ \textcolor{comment}{\ \ -\/\ LINEN,\ STOP\ and\ CLKEN\ bits\ in\ the\ USART\_CR2\ register,}}
\DoxyCodeLine{02880\ \textcolor{comment}{\ \ -\/\ SCEN\ and\ HDSEL\ bits\ in\ the\ USART\_CR3\ register.}}
\DoxyCodeLine{02881\ \textcolor{comment}{\ \ */}}
\DoxyCodeLine{02882\ \ \ CLEAR\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_aa7ede2de6204c3fc4bd9fb328801c99a}{CR2}},\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_gac8931efa62c29d92f5c0ec5a05f907ef}{USART\_CR2\_LINEN}}\ |\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga42a396cde02ffa0c4d3fd9817b6af853}{USART\_CR2\_CLKEN}}\ |\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gaf993e483318ebcecffd18649de766dc6}{USART\_CR2\_STOP}}));}
\DoxyCodeLine{02883\ \ \ CLEAR\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga9180b9249a26988f71d4bb2b0c3eec27}{USART\_CR3\_SCEN}}\ |\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gac71129810fab0b46d91161a39e3f8d01}{USART\_CR3\_HDSEL}}));}
\DoxyCodeLine{02884\ \ \ \textcolor{comment}{/*\ set\ the\ UART/USART\ in\ IRDA\ mode\ */}}
\DoxyCodeLine{02885\ \ \ SET\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga31c66373bfbae7724c836ac63b8411dd}{USART\_CR3\_IREN}});}
\DoxyCodeLine{02886\ \}}
\DoxyCodeLine{02887\ }
\DoxyCodeLine{02915\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_ConfigMultiProcessMode(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{02916\ \{}
\DoxyCodeLine{02917\ \ \ \textcolor{comment}{/*\ In\ Multi\ Processor\ mode,\ the\ following\ bits\ must\ be\ kept\ cleared:}}
\DoxyCodeLine{02918\ \textcolor{comment}{\ \ -\/\ LINEN\ and\ CLKEN\ bits\ in\ the\ USART\_CR2\ register,}}
\DoxyCodeLine{02919\ \textcolor{comment}{\ \ -\/\ IREN,\ SCEN\ and\ HDSEL\ bits\ in\ the\ USART\_CR3\ register.}}
\DoxyCodeLine{02920\ \textcolor{comment}{\ \ */}}
\DoxyCodeLine{02921\ \ \ CLEAR\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_aa7ede2de6204c3fc4bd9fb328801c99a}{CR2}},\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_gac8931efa62c29d92f5c0ec5a05f907ef}{USART\_CR2\_LINEN}}\ |\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga42a396cde02ffa0c4d3fd9817b6af853}{USART\_CR2\_CLKEN}}));}
\DoxyCodeLine{02922\ \ \ CLEAR\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga9180b9249a26988f71d4bb2b0c3eec27}{USART\_CR3\_SCEN}}\ |\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gac71129810fab0b46d91161a39e3f8d01}{USART\_CR3\_HDSEL}}\ |\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga31c66373bfbae7724c836ac63b8411dd}{USART\_CR3\_IREN}}));}
\DoxyCodeLine{02923\ \}}
\DoxyCodeLine{02924\ }
\DoxyCodeLine{02928\ }
\DoxyCodeLine{02932\ }
\DoxyCodeLine{02939\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_USART\_IsActiveFlag\_PE(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{02940\ \{}
\DoxyCodeLine{02941\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a79ce09e9fbedb2d169b3a584ed003b02}{ISR}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gaa10e69d231b67d698ab59db3d338baa6}{USART\_ISR\_PE}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_gaa10e69d231b67d698ab59db3d338baa6}{USART\_ISR\_PE}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{02942\ \}}
\DoxyCodeLine{02943\ }
\DoxyCodeLine{02950\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_USART\_IsActiveFlag\_FE(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{02951\ \{}
\DoxyCodeLine{02952\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a79ce09e9fbedb2d169b3a584ed003b02}{ISR}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga27cc4dfb6d5e817a69c80471b87deb4b}{USART\_ISR\_FE}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga27cc4dfb6d5e817a69c80471b87deb4b}{USART\_ISR\_FE}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{02953\ \}}
\DoxyCodeLine{02954\ }
\DoxyCodeLine{02961\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_USART\_IsActiveFlag\_NE(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{02962\ \{}
\DoxyCodeLine{02963\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a79ce09e9fbedb2d169b3a584ed003b02}{ISR}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga09c7d19477a091689f50bd0ef5b6a3d8}{USART\_ISR\_NE}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga09c7d19477a091689f50bd0ef5b6a3d8}{USART\_ISR\_NE}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{02964\ \}}
\DoxyCodeLine{02965\ }
\DoxyCodeLine{02972\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_USART\_IsActiveFlag\_ORE(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{02973\ \{}
\DoxyCodeLine{02974\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a79ce09e9fbedb2d169b3a584ed003b02}{ISR}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga9e5b4a08e3655bed8ec3022947cfc542}{USART\_ISR\_ORE}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga9e5b4a08e3655bed8ec3022947cfc542}{USART\_ISR\_ORE}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{02975\ \}}
\DoxyCodeLine{02976\ }
\DoxyCodeLine{02983\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_USART\_IsActiveFlag\_IDLE(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
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\DoxyCodeLine{02998\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_USART\_IsActiveFlag\_RXNE\_RXFNE(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
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\DoxyCodeLine{03024\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_USART\_IsActiveFlag\_TXE\_TXFNF(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
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\DoxyCodeLine{03896\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_USART\_IsEnabledIT\_IDLE(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
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\DoxyCodeLine{03937\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_USART\_IsEnabledIT\_TXE\_TXFNF(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
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\DoxyCodeLine{04098\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_USART\_IsEnabledIT\_RXFT(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{04099\ \{}
\DoxyCodeLine{04100\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga49fc035fafb880dadb6a60fdf2ba8795}{USART\_CR3\_RXFTIE}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga49fc035fafb880dadb6a60fdf2ba8795}{USART\_CR3\_RXFTIE}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{04101\ \}}
\DoxyCodeLine{04102\ }
\DoxyCodeLine{04106\ }
\DoxyCodeLine{04110\ }
\DoxyCodeLine{04117\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_EnableDMAReq\_RX(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{04118\ \{}
\DoxyCodeLine{04119\ \ \ ATOMIC\_SET\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gaff130f15493c765353ec2fd605667c5a}{USART\_CR3\_DMAR}});}
\DoxyCodeLine{04120\ \}}
\DoxyCodeLine{04121\ }
\DoxyCodeLine{04128\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_DisableDMAReq\_RX(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{04129\ \{}
\DoxyCodeLine{04130\ \ \ ATOMIC\_CLEAR\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gaff130f15493c765353ec2fd605667c5a}{USART\_CR3\_DMAR}});}
\DoxyCodeLine{04131\ \}}
\DoxyCodeLine{04132\ }
\DoxyCodeLine{04139\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_USART\_IsEnabledDMAReq\_RX(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{04140\ \{}
\DoxyCodeLine{04141\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gaff130f15493c765353ec2fd605667c5a}{USART\_CR3\_DMAR}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_gaff130f15493c765353ec2fd605667c5a}{USART\_CR3\_DMAR}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{04142\ \}}
\DoxyCodeLine{04143\ }
\DoxyCodeLine{04150\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_EnableDMAReq\_TX(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{04151\ \{}
\DoxyCodeLine{04152\ \ \ ATOMIC\_SET\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga5bb515d3814d448f84e2c98bf44f3993}{USART\_CR3\_DMAT}});}
\DoxyCodeLine{04153\ \}}
\DoxyCodeLine{04154\ }
\DoxyCodeLine{04161\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_DisableDMAReq\_TX(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{04162\ \{}
\DoxyCodeLine{04163\ \ \ ATOMIC\_CLEAR\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga5bb515d3814d448f84e2c98bf44f3993}{USART\_CR3\_DMAT}});}
\DoxyCodeLine{04164\ \}}
\DoxyCodeLine{04165\ }
\DoxyCodeLine{04172\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_USART\_IsEnabledDMAReq\_TX(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{04173\ \{}
\DoxyCodeLine{04174\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga5bb515d3814d448f84e2c98bf44f3993}{USART\_CR3\_DMAT}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga5bb515d3814d448f84e2c98bf44f3993}{USART\_CR3\_DMAT}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{04175\ \}}
\DoxyCodeLine{04176\ }
\DoxyCodeLine{04183\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_EnableDMADeactOnRxErr(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{04184\ \{}
\DoxyCodeLine{04185\ \ \ SET\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gae1f1b53b09336e82958755747853a753}{USART\_CR3\_DDRE}});}
\DoxyCodeLine{04186\ \}}
\DoxyCodeLine{04187\ }
\DoxyCodeLine{04194\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_DisableDMADeactOnRxErr(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{04195\ \{}
\DoxyCodeLine{04196\ \ \ CLEAR\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gae1f1b53b09336e82958755747853a753}{USART\_CR3\_DDRE}});}
\DoxyCodeLine{04197\ \}}
\DoxyCodeLine{04198\ }
\DoxyCodeLine{04205\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_USART\_IsEnabledDMADeactOnRxErr(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{04206\ \{}
\DoxyCodeLine{04207\ \ \ \textcolor{keywordflow}{return}\ ((READ\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_af2991da9a4e1539530cd6b7b327199cc}{CR3}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gae1f1b53b09336e82958755747853a753}{USART\_CR3\_DDRE}})\ ==\ (\mbox{\hyperlink{group___peripheral___registers___bits___definition_gae1f1b53b09336e82958755747853a753}{USART\_CR3\_DDRE}}))\ ?\ 1UL\ :\ 0UL);}
\DoxyCodeLine{04208\ \}}
\DoxyCodeLine{04209\ }
\DoxyCodeLine{04220\ \_\_STATIC\_INLINE\ uint32\_t\ LL\_USART\_DMA\_GetRegAddr(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx,\ uint32\_t\ Direction)}
\DoxyCodeLine{04221\ \{}
\DoxyCodeLine{04222\ \ \ uint32\_t\ data\_reg\_addr;}
\DoxyCodeLine{04223\ }
\DoxyCodeLine{04224\ \ \ \textcolor{keywordflow}{if}\ (Direction\ ==\ LL\_USART\_DMA\_REG\_DATA\_TRANSMIT)}
\DoxyCodeLine{04225\ \ \ \{}
\DoxyCodeLine{04226\ \ \ \ \ \textcolor{comment}{/*\ return\ address\ of\ TDR\ register\ */}}
\DoxyCodeLine{04227\ \ \ \ \ data\_reg\_addr\ =\ (uint32\_t)\ \&(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a315ab2fb3869668e7c5c12e8204efe10}{TDR}});}
\DoxyCodeLine{04228\ \ \ \}}
\DoxyCodeLine{04229\ \ \ \textcolor{keywordflow}{else}}
\DoxyCodeLine{04230\ \ \ \{}
\DoxyCodeLine{04231\ \ \ \ \ \textcolor{comment}{/*\ return\ address\ of\ RDR\ register\ */}}
\DoxyCodeLine{04232\ \ \ \ \ data\_reg\_addr\ =\ (uint32\_t)\ \&(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a8d538b7390289142b70428c5b0af0a18}{RDR}});}
\DoxyCodeLine{04233\ \ \ \}}
\DoxyCodeLine{04234\ }
\DoxyCodeLine{04235\ \ \ \textcolor{keywordflow}{return}\ data\_reg\_addr;}
\DoxyCodeLine{04236\ \}}
\DoxyCodeLine{04237\ }
\DoxyCodeLine{04241\ }
\DoxyCodeLine{04245\ }
\DoxyCodeLine{04252\ \_\_STATIC\_INLINE\ uint8\_t\ LL\_USART\_ReceiveData8(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{04253\ \{}
\DoxyCodeLine{04254\ \ \ \textcolor{keywordflow}{return}\ (uint8\_t)(READ\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a8d538b7390289142b70428c5b0af0a18}{RDR}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gaec1e63e26cd15479d01a5f13991e1184}{USART\_RDR\_RDR}})\ \&\ 0xFFU);}
\DoxyCodeLine{04255\ \}}
\DoxyCodeLine{04256\ }
\DoxyCodeLine{04263\ \_\_STATIC\_INLINE\ uint16\_t\ LL\_USART\_ReceiveData9(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{04264\ \{}
\DoxyCodeLine{04265\ \ \ \textcolor{keywordflow}{return}\ (uint16\_t)(READ\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a8d538b7390289142b70428c5b0af0a18}{RDR}},\ \mbox{\hyperlink{group___peripheral___registers___bits___definition_gaec1e63e26cd15479d01a5f13991e1184}{USART\_RDR\_RDR}}));}
\DoxyCodeLine{04266\ \}}
\DoxyCodeLine{04267\ }
\DoxyCodeLine{04275\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_TransmitData8(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx,\ uint8\_t\ Value)}
\DoxyCodeLine{04276\ \{}
\DoxyCodeLine{04277\ \ \ USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a315ab2fb3869668e7c5c12e8204efe10}{TDR}}\ =\ Value;}
\DoxyCodeLine{04278\ \}}
\DoxyCodeLine{04279\ }
\DoxyCodeLine{04287\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_TransmitData9(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx,\ uint16\_t\ Value)}
\DoxyCodeLine{04288\ \{}
\DoxyCodeLine{04289\ \ \ USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_a315ab2fb3869668e7c5c12e8204efe10}{TDR}}\ =\ (uint16\_t)(Value\ \&\ 0x1FFUL);}
\DoxyCodeLine{04290\ \}}
\DoxyCodeLine{04291\ }
\DoxyCodeLine{04295\ }
\DoxyCodeLine{04299\ }
\DoxyCodeLine{04308\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_RequestAutoBaudRate(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{04309\ \{}
\DoxyCodeLine{04310\ \ \ SET\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_add7a9e13a3281f6bea133b3693ce68f8}{RQR}},\ (uint16\_t)\mbox{\hyperlink{group___peripheral___registers___bits___definition_gad261e1474dfb5329b5520e22790b026b}{USART\_RQR\_ABRRQ}});}
\DoxyCodeLine{04311\ \}}
\DoxyCodeLine{04312\ }
\DoxyCodeLine{04319\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_RequestBreakSending(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{04320\ \{}
\DoxyCodeLine{04321\ \ \ SET\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_add7a9e13a3281f6bea133b3693ce68f8}{RQR}},\ (uint16\_t)\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga2d1a36c6b492c425b4e5cc94d983ecf1}{USART\_RQR\_SBKRQ}});}
\DoxyCodeLine{04322\ \}}
\DoxyCodeLine{04323\ }
\DoxyCodeLine{04330\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_RequestEnterMuteMode(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{04331\ \{}
\DoxyCodeLine{04332\ \ \ SET\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_add7a9e13a3281f6bea133b3693ce68f8}{RQR}},\ (uint16\_t)\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga2aae0f4fb0a74822ce212ea7d9b8463a}{USART\_RQR\_MMRQ}});}
\DoxyCodeLine{04333\ \}}
\DoxyCodeLine{04334\ }
\DoxyCodeLine{04345\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_RequestRxDataFlush(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{04346\ \{}
\DoxyCodeLine{04347\ \ \ SET\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_add7a9e13a3281f6bea133b3693ce68f8}{RQR}},\ (uint16\_t)\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga7b148ee7c697bbcf836648063613612a}{USART\_RQR\_RXFRQ}});}
\DoxyCodeLine{04348\ \}}
\DoxyCodeLine{04349\ }
\DoxyCodeLine{04358\ \_\_STATIC\_INLINE\ \textcolor{keywordtype}{void}\ LL\_USART\_RequestTxDataFlush(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx)}
\DoxyCodeLine{04359\ \{}
\DoxyCodeLine{04360\ \ \ SET\_BIT(USARTx-\/>\mbox{\hyperlink{struct_u_s_a_r_t___type_def_add7a9e13a3281f6bea133b3693ce68f8}{RQR}},\ (uint16\_t)\mbox{\hyperlink{group___peripheral___registers___bits___definition_gaa40d2e52b5955b30c9399eb3dec769e8}{USART\_RQR\_TXFRQ}});}
\DoxyCodeLine{04361\ \}}
\DoxyCodeLine{04362\ }
\DoxyCodeLine{04366\ }
\DoxyCodeLine{04367\ \textcolor{preprocessor}{\#if\ defined(USE\_FULL\_LL\_DRIVER)}\textcolor{preprocessor}{}}
\DoxyCodeLine{04371\ ErrorStatus\ LL\_USART\_DeInit(\textcolor{keyword}{const}\ \mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx);}
\DoxyCodeLine{04372\ ErrorStatus\ LL\_USART\_Init(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx,\ \textcolor{keyword}{const}\ LL\_USART\_InitTypeDef\ *USART\_InitStruct);}
\DoxyCodeLine{04373\ \textcolor{keywordtype}{void}\ \ \ \ \ \ \ \ LL\_USART\_StructInit(LL\_USART\_InitTypeDef\ *USART\_InitStruct);}
\DoxyCodeLine{04374\ ErrorStatus\ LL\_USART\_ClockInit(\mbox{\hyperlink{struct_u_s_a_r_t___type_def}{USART\_TypeDef}}\ *USARTx,\ \textcolor{keyword}{const}\ LL\_USART\_ClockInitTypeDef\ *USART\_ClockInitStruct);}
\DoxyCodeLine{04375\ \textcolor{keywordtype}{void}\ \ \ \ \ \ \ \ LL\_USART\_ClockStructInit(LL\_USART\_ClockInitTypeDef\ *USART\_ClockInitStruct);}
\DoxyCodeLine{04379\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ USE\_FULL\_LL\_DRIVER\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{04380\ }
\DoxyCodeLine{04384\ }
\DoxyCodeLine{04388\ }
\DoxyCodeLine{04389\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ USART1\ ||\ USART2\ ||\ USART3\ ||\ USART6\ ||\ UART4\ ||\ UART5\ ||\ UART7\ ||\ UART8\ ||\ UART9\ ||\ USART10\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{04390\ }
\DoxyCodeLine{04394\ }
\DoxyCodeLine{04395\ \textcolor{preprocessor}{\#ifdef\ \_\_cplusplus}}
\DoxyCodeLine{04396\ \}}
\DoxyCodeLine{04397\ \textcolor{preprocessor}{\#endif}}
\DoxyCodeLine{04398\ }
\DoxyCodeLine{04399\ \textcolor{preprocessor}{\#endif\ }\textcolor{comment}{/*\ STM32H7xx\_LL\_USART\_H\ */}\textcolor{preprocessor}{}}
\DoxyCodeLine{04400\ }

\end{DoxyCode}
